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MTP10N40EUA

更新时间: 2024-01-30 05:45:28
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摩托罗拉 - MOTOROLA /
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MTP10N40EUA 数据手册

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Order this document  
by MTP10N40E/D  
SEMICONDUCTOR TECHNICAL DATA  
N–Channel Enhancement–Mode Silicon Gate  
TMOS POWER FET  
This advanced high voltage TMOS E–FET is designed to  
withstand high energy in the avalanche mode and switch efficiently.  
This new high energy device also offers a drain–to–source diode  
with fast recovery time. Designed for high voltage, high speed  
switching applications such as power supplies, PWM motor  
controls and other inductive loads, the avalanche energy capability  
is specified to eliminate the guesswork in designs where inductive  
loads are switched and offer additional safety margin against  
unexpected voltage transients.  
10 AMPERES  
400 VOLTS  
R
= 0.55 OHMS  
DS(on)  
Avalanche Energy Capability Specified at Elevated  
Temperature  
D
Low Stored Gate Charge for Efficient Switching  
Internal Source–to–Drain Diode Designed to Replace External  
Zener Transient Suppressor — Absorbs High Energy in the  
Avalanche Mode  
G
Source–to–Drain Diode Recovery Time Comparable to Discrete  
Fast Recovery Diode  
S
CASE 221A–06, Style 5  
TO-220AB  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Symbol  
Value  
400  
Unit  
Vdc  
Vdc  
Drain–Source Voltage  
V
DSS  
Drain–Gate Voltage (R  
GS  
= 1.0 M)  
V
DGR  
400  
Gate–Source Voltage — Continuous  
Gate–Source Voltage — Non–repetitive  
V
±20  
±40  
Vdc  
Vpk  
GS  
V
GSM  
Drain Current — Continuous  
Drain Current — Pulsed  
I
10  
40  
Adc  
D
I
DM  
Total Power Dissipation  
Derate above 25°C  
P
D
125  
1.0  
Watts  
W/°C  
Operating and Storage Temperature Range  
T , T  
65 to 150  
°C  
J
stg  
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (T < 150°C)  
J
Single Pulse Drain–to–Source Avalanche Energy — T = 25°C  
W
W
520  
83  
13  
mJ  
J
DSR(1)  
Single Pulse Drain–to–Source Avalanche Energy — T = 100°C  
J
Repetitive Pulse Drain–to–Source Avalanche Energy  
DSR(2)  
THERMAL CHARACTERISTICS  
Thermal Resistance — Junction to Case  
Thermal Resistance — Junction to Ambient°  
R
R
1.0  
62.5  
°C/W  
°C  
θJC  
θJA  
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 5 seconds  
T
275  
L
(1) V  
DD  
= 50 V, I = 10 A  
D
(2) Pulse Width and frequency is limited by T (max) and thermal response  
J
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit  
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.  
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
Motorola, Inc. 1996  

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