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MTB4N80E1 PDF预览

MTB4N80E1

更新时间: 2024-01-12 09:47:28
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 晶体晶体管功率场效应晶体管开关脉冲
页数 文件大小 规格书
8页 163K
描述
TMOS POWER FET 4.0 AMPERES 800 VOLTS

MTB4N80E1 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:IN-LINE, R-PSIP-T3Reach Compliance Code:unknown
风险等级:5.75雪崩能效等级(Eas):320 mJ
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:800 V最大漏极电流 (Abs) (ID):4 A
最大漏极电流 (ID):4 A最大漏源导通电阻:3 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJESD-30 代码:R-PSIP-T3
JESD-609代码:e0元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:IN-LINE
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):125 W
最大脉冲漏极电流 (IDM):12 A认证状态:Not Qualified
子类别:FET General Purpose Power表面贴装:NO
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子位置:SINGLE晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

MTB4N80E1 数据手册

 浏览型号MTB4N80E1的Datasheet PDF文件第2页浏览型号MTB4N80E1的Datasheet PDF文件第3页浏览型号MTB4N80E1的Datasheet PDF文件第4页浏览型号MTB4N80E1的Datasheet PDF文件第5页浏览型号MTB4N80E1的Datasheet PDF文件第6页浏览型号MTB4N80E1的Datasheet PDF文件第7页 
Order this document  
by MTB4N80E1/D  
SEMICONDUCTOR TECHNICAL DATA  
Motorola Preferred Device  
TMOS POWER FET  
4.0 AMPERES  
800 VOLTS  
N–Channel Enhancement–Mode Silicon Gate  
This high voltage MOSFET uses an advanced termination  
scheme to provide enhanced voltage–blocking capability without  
degrading performance over time. In addition, this advanced TMOS  
E–FET is designed to withstand high energy in the avalanche and  
commutation modes. The new energy efficient design also offers a  
drain–to–source diode with a fast recovery time. Designed for high  
voltage, high speed switching applications in power supplies,  
converters and PWM motor controls, these devices are particularly  
well suited for bridge circuits where diode speed and commutating  
safe operating areas are critical and offer additional safety margin  
against unexpected voltage transients.  
R
= 3.0 OHM  
DS(on)  
D
Robust High Voltage Termination  
Avalanche Energy Specified  
Source–to–Drain Diode Recovery Time Comparable to a  
Discrete Fast Recovery Diode  
G
CASE 418C–01, Style 2  
2
D PAK–SL  
Diode is Characterized for Use in Bridge Circuits  
S
I
and V  
Specified at Elevated Temperature  
DSS  
DS(on)  
Short Heatsink Tab Manufactured — Not Sheared  
Specially Designed Leadframe for Maximum Power Dissipation  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Symbol  
Value  
800  
Unit  
Drain–Source Voltage  
V
DSS  
Vdc  
Vdc  
Drain–Gate Voltage (R  
= 1.0 M)  
Gate–Source Voltage — Continuous  
V
DGR  
800  
GS  
V
± 20  
± 40  
Vdc  
Vpk  
GS  
Gate–Source Voltage — Non–Repetitive (t 10 ms)  
V
GSM  
p
Drain Current — Continuous  
Drain Current — Continuous @ 100°C  
Drain Current — Single Pulse (t 10 µs)  
I
I
4.0  
2.9  
12  
Adc  
D
D
I
Apk  
p
DM  
Total Power Dissipation  
Derate above 25°C  
P
D
125  
1.0  
2.5  
Watts  
W/°C  
Watts  
Total Power Dissipation @ T = 25°C, when mounted with the minimum recommended pad size  
A
Operating and Storage Temperature Range  
T , T  
stg  
– 55 to 150  
320  
°C  
J
Single Pulse Drain–to–Source Avalanche Energy — Starting T = 25°C  
E
AS  
mJ  
J
(V  
DD  
= 100 Vdc, V  
= 10 Vdc, I = 8.0 Apk, L = 10 mH, R = 25 )  
GS L G  
Thermal Resistance — Junction to Case  
Thermal Resistance — Junction to Ambient  
Thermal Resistance — Junction to Ambient, when mounted with the minimum recommended pad size  
R
R
R
1.0  
62.5  
50  
°C/W  
°C  
θJC  
θJA  
θJA  
Maximum Lead Temperature for Soldering Purposes, 1/8from case for 10 seconds  
T
260  
L
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.  
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
Preferred devices are Motorola recommended choices for future use and best overall value.  
Motorola, Inc. 1997  

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