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MSM7719-01 PDF预览

MSM7719-01

更新时间: 2024-01-08 21:08:23
品牌 Logo 应用领域
冲电气 - OKI 转换器PC
页数 文件大小 规格书
40页 217K
描述
Echo Canceler with ADPCM Transcoder

MSM7719-01 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QFP, TQFP100,.63SQReach Compliance Code:unknown
风险等级:5.92压伸定律:MU-LAW
滤波器:YES最大增益公差:1 dB
JESD-30 代码:S-PQFP-G100JESD-609代码:e0
线性编码:NOT AVAILABLE功能数量:1
端子数量:100最高工作温度:70 °C
最低工作温度:-25 °C封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:TQFP100,.63SQ
封装形状:SQUARE封装形式:FLATPACK
电源:5 V认证状态:Not Qualified
子类别:Codecs最大压摆率:80 mA
标称供电电压:5 V表面贴装:YES
技术:CMOS电信集成电路类型:PCM CODEC
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUADBase Number Matches:1

MSM7719-01 数据手册

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MSM7719-01  
¡ Semiconductor  
BCLKA  
Shift clock input for the ADPCM data (IS, IR).  
The frequency is from 64 kHz to 2048 kHz.  
SYNCA  
8 kHz synchronous signal input for ADPCM data.  
Synchronize this data with BCLKA signal. SYNCA is used for indicating the MSB of the serial  
ADPCM data stream.  
BCLKP  
Shift clock input for the PCM data (PCMLNO/PCMLNI, PCMACO/PCMACI, PCMADO/  
PCMADI). The frequency is set in the range of 64 kHz to 2048 kHz.  
SYNCP  
8 kHz synchronous signal input for PCM data.  
This signal must be synchronized with the BCLKP signal.  
MCUSL, MTYPE  
If the microcontroller interface is not to be used, set the MCUSL input pin to logic “1”. This setting  
skips the intitial mode as the operating mode. For the MTYPE pin, which is the microcontroller  
interface selection pin, logic “0” sets the read/write independent control mode and logic “1” sets  
read/write shared control mode.  
Whenthispincontrolisnotused(i.e.,whencontrollingbythecontrolregister),setthesepinstologic  
“0”.  
CS, RD, WR  
A19-bytecontrolregisterisprovidedinthisLSIdevice. Dataisreadandwrittenbyusingthesepins  
from the external microcontroller. See the microcontroller write and read timing diagrams in the  
Electrical Characteristics.  
Whenthispincontrolisnotused(i.e.,whencontrollingbythecontrolregister),setthesepinstologic  
“1”.  
A4-A0, D7-D0  
A4-A0 are address input pins of the control register, and D7-D0 are data I/O pins.  
Whenthispincontrolisnotused(i.e.,whencontrollingbythecontrolregister),setthesepinstologic  
“0”.  
INT  
Reserved.  
PCMSL  
Reserved.  
7/40  

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