MSM7544

更新时间： 2024-01-31 23:11:23

品牌	Logo	应用领域
冲电气 - OKI		/
页数	文件大小	规格书
19页	160K
描述
Single Rail CODEC

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技术参数
数据手册

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MSM7544 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	TSSOP, TSSOP20/26,.36	Reach Compliance Code：	unknown
风险等级：	5.92	压伸定律：	A-LAW
滤波器：	YES	最大增益公差：	1.2 dB
JESD-30 代码：	R-PDSO-G20	JESD-609代码：	e0
线性编码：	NOT AVAILABLE	功能数量：	1
端子数量：	20	最高工作温度：	85 °C
最低工作温度：	-30 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP20/26,.36
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：	5 V	认证状态：	Not Qualified
子类别：	Codecs	最大压摆率：	6 mA
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	PCM CODEC
温度等级：	OTHER	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	Base Number Matches：	1

MSM7544 数据手册

¡ Semiconductor

MSM7543/7544

Ground for the digital signal circuits.

This ground is separate from the analog signal ground. The DG pin must be connected to the AG

pin on the printed circuit board to make a common analog ground.

PDN

Power down control signal.

A logic "0" level drives both transmit and receive circuits to a power down state.

PCMOUT

PCM signal output.

The PCM output signal is output from MSD in a sequential order, synchronizing with the rising

edge of the BCLOCK signal.

MSD may be output at the rising edge of the XSYNC signal, based on the timing between

BCLOCK and XSYNC.

This pin is in a high impedance state except during 8-bit PCM output. It is also in a high

impedance state during power saving or power down modes.

Apull-upresistormustbeconnectedtothispinbecauseitsoutputisconfiguredasanopendrain.

This device is compatible with the ITU-T recommendation on coding law and output coding

format.

The MSM7544(A-law) outputs the character signal, inverting the even bits.

PCMIN/PCMOUT

Input/Output Level

MSM7543 (m-law)

MSM7544 (A-law)

MSD

+Full scale

–0

–Full scale

Signal ground voltage output.

The output voltage is 1/2 of the power supply voltage.

The output drive current capability is ±300 mA.

This pin provides the SG level for CODEC peripherals.

This output voltage level is undefined during power saving or power down modes.

SGC

Used to generate the signal ground voltage level by connecting a bypass capacitor.

Connect a 0.1 mF capacitor with excellent high frequency characteristics between the AG pin and

the SGC pin.

7/19

1...4 5 678 9 10...19

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