5秒后页面跳转
MPXR2005VMM80R PDF预览

MPXR2005VMM80R

更新时间: 2024-02-16 15:11:42
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 微控制器
页数 文件大小 规格书
30页 137K
描述
32-bit Power Architecture® Microcontrollers for Highly Reliable

MPXR2005VMM80R 数据手册

 浏览型号MPXR2005VMM80R的Datasheet PDF文件第5页浏览型号MPXR2005VMM80R的Datasheet PDF文件第6页浏览型号MPXR2005VMM80R的Datasheet PDF文件第7页浏览型号MPXR2005VMM80R的Datasheet PDF文件第9页浏览型号MPXR2005VMM80R的Datasheet PDF文件第10页浏览型号MPXR2005VMM80R的Datasheet PDF文件第11页 
Features  
The DPM mode increased performances can be estimated in first approximation as about 1.6× the  
performance of the LSM mode at the same frequency for shared program flash configuration (up to 2×,  
depending on software).  
PXS20 devices support only static configuration at power-on (either LSM or DPM).  
2.4.3  
Mode-Specific Performance Parameters  
LSM:  
— Up to 240 million integer instructions per second (dual integer unit)  
— Up to 240 million floating point instructions per second (FPU)  
— Up to 480 million multiply and accumulate instructions per second (SPE)  
DPM:  
— 384–480 million integer/floating point instructions per second  
— 768–960 million multiply and accumulate instructions per second  
2.4.4  
Functional Safety Suitability  
The PXS20 has been successfully assessed by Exida Certification (Official Certification issued on Nov.  
30th 2007) to be fit for purpose to achieve a safety integrity level 3 (SIL3) as per IEC61508-part 2 standard  
with an overall SoC PFH of 0.1 FIT in LSM mode.  
The mode of operation which allows to reach the highest safety level with minimum software requirement  
is the Lock Step mode (LSM).  
SIL3 innovative safety concept:  
LockStep mode and Fail-safe protection  
Sphere of replication (SoR) for key components (such as CPU core, eDMA, crossbar switch)  
Fault collection and control unit (FCCU)  
Redundancy control and checker unit (RCCU) on outputs of the SoR connected to FCCU  
Boot-time Built-In Self-Test for Memory (MBIST) and Logic (LBIST) triggered by hardware  
Boot-time Built-In Self-Test for ADC and flash memory triggered by software  
Replicated safety enhanced watchdog  
Replicated junction temperature sensor  
Non-maskable interrupt (NMI)  
16-region memory protection unit (MPU)  
Clock monitoring units (CMU)  
Power management unit (PMU)  
Cyclic redundancy check (CRC) unit  
2.5  
Module Features  
PXS20 Product Brief, Rev. 1  
8
Freescale Semiconductor  

与MPXR2005VMM80R相关器件

型号 品牌 获取价格 描述 数据表
MPXR2005VVU120R FREESCALE

获取价格

PXD20 Microcontroller
MPXR2005VVU80R FREESCALE

获取价格

PXD20 Microcontroller
MPXR2010VLQ120R FREESCALE

获取价格

32-bit Power Architecture® Microcontrollers
MPXR2010VLQ80R FREESCALE

获取价格

32-bit Power Architecture® Microcontrollers
MPXR2010VLT120R FREESCALE

获取价格

PXD20 Microcontroller
MPXR2010VLT80R FREESCALE

获取价格

PXD20 Microcontroller
MPXR2010VLU120R FREESCALE

获取价格

PXD20 Microcontroller
MPXR2010VLU80R FREESCALE

获取价格

PXD20 Microcontroller
MPXR2010VMM120R FREESCALE

获取价格

PXS20 Microcontroller
MPXR2010VMM80R FREESCALE

获取价格

32-bit Power Architecture® Microcontrollers