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MPXR1010VLU120R PDF预览

MPXR1010VLU120R

更新时间: 2022-02-26 10:40:13
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 微控制器
页数 文件大小 规格书
26页 128K
描述
32-bit Power Architecture® Microcontrollers for Entry Level Display Solutions

MPXR1010VLU120R 数据手册

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Table 2 summarizes the operating modes of PXD10 devices.  
1
Table 2. Operating mode summary  
SOC features  
Clock sources  
Wake-up time2  
Operating  
modes  
RUN  
On OP OP On On OP OP On OP On OP  
FP  
HALT  
CG OP OP On On OP OP On OP On OP OP OP FP  
TBD  
STOP  
CG CG CG On On CG CG OP OP On OP OP OP LP 50 µs 4 µs 20 µs 1ms 200 µs  
24 µs  
STANDBY Off Off3 Off CG4 Off Off Off OP OP On OP OP OP LP 50 µs 8 µs 100 µs 1ms 200 µs Var 28 µs  
Off Off Off 8K5 Off Off Off OP OP On OP OP OP LP 50 µs 8 µs 100 µs 1ms 200 µs Var 28 µs  
POR  
500 µs 8 µs 100 µs 1ms 200 µs  
BAM  
NOTES:  
1
Table Key:  
On—Powered and clocked  
OP—Optionally configurable to be enabled or disabled (clock gated)  
CG—Clock Gated, Powered but clock stopped  
Off—Powered off and clock gated  
FP—VREG Full Performance mode  
LP—VREG Low Power mode, reduced output capability of VREG but lower power consumption  
Var—Variable duration, based on the required reconfiguration and execution clock speed  
BAM—Boot Assist Module Software and Hardware used for device start-up and configuration  
2
A high level summary of some key durations that need to be considered when recovering from low power modes. This does not account for all  
durations at wake up. Other delays will be necessary to consider including, but not limited to the external supply start-up time.  
IRC Wake-up time must not be added to the overall wake-up time as it starts in parallel with the VREG.  
All other wake-up times must be added to determine the total start-up time  
3
4
5
The LCD can optionally be kept running while the device is in STANDBY mode.  
All of the RAM contents is retained, but not accessible in STANDBY mode.  
8 KB of the RAM contents is retained, but not accessible in STANDBY mode.  

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