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MPQ4322-AEC1 PDF预览

MPQ4322-AEC1

更新时间: 2024-04-09 19:03:27
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芯源 - MPS /
页数 文件大小 规格书
43页 3735K
描述
42V 负载突降容限、2A、超紧凑、低静态电流(IQ)同步降压变换器,符合 AEC-Q100 认证

MPQ4322-AEC1 数据手册

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PIN FUNCTIONS  
Pin #  
Name Description  
1, 11  
PGND Power ground.  
Input supply. The VIN pins supply power to the internal control circuitry and the power  
MOSFET connected to the SW pin. The two VIN pins are connected internally. Place a  
decoupling capacitor connected to PGND as close as possible to each VIN pin to minimize  
switching spikes.  
2, 10  
VIN  
Bootstrap. The BOOT pin is the positive power supply for the high-side MOSFET (HS-FET)  
driver connected to SW. Connect a bypass capacitor between the BOOT and SW pins.  
3
4
BOOT  
FREQ  
Switching frequency configuration. Connect a resistor between the FREQ pin and AGND  
to set the switching frequency (fSW).  
Bias supply. The VCC pin is the output of the internal regulator that supplies power to the  
internal control circuit and gate drivers. Place a minimum 1μF decoupling capacitor between  
VCC and AGND. The capacitor should be placed as close as possible to VCC.  
5
6
VCC  
AGND Analog ground.  
Feedback input. The FB pin is the negative input of the error amplifier (EA) (typically 0.8V).  
For the fixed-output version, connect FB directly to the output voltage (VOUT). For the  
adjustable-output version, connect FB to the middle point of the external feedback divider  
7
8
FB  
between the output and AGND to set VOUT  
.
Power good output. The PG pin is an open-drain output. If PG is used, connect PG to a  
power source via a pull-up resistor. If VOUT is within 94.5% to 105.5% of the nominal voltage,  
then PG goes high. If VOUT exceeds 107% or drops below 93% of the nominal voltage, then  
PG goes low. Float PG if not used.  
PG  
Enable. Pull the EN pin above 1.02V to turn the converter on; pull EN below 0.85V to turn it  
off. EN does not require an internal pull-up or pull-down resistor. Do not float EN.  
9
EN  
Switch node. The SW pin is the source of the HS-FET and the drain of the low-side  
MOSFET (LS-FET).  
12  
SW  
MPQ4322 Rev. 1.0  
4/6/2023  
MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2023 MPS. All Rights Reserved.  
5

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