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MIC74

更新时间： 2024-02-24 01:13:37
品牌 Logo 应用领域
麦瑞 - MICREL 风扇控制器
页数 文件大小 规格书
20页 142K
描述
2-Wire Serial I/O Expander and Fan Controller Advance Information

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MIC74 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Transferred零件包装代码：SOIC
包装说明：SSOP,针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.37
JESD-30 代码：R-PDSO-G16JESD-609代码：e3
长度：4.9 mm湿度敏感等级：1
I/O 线路数量：8端口数量：1
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.75 mm
最大供电电压：3.6 V最小供电电压：2.7 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：3.9116 mm
uPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches：1

MIC74 数据手册

 浏览型号MIC74的Datasheet PDF文件第2页浏览型号MIC74的Datasheet PDF文件第3页浏览型号MIC74的Datasheet PDF文件第4页浏览型号MIC74的Datasheet PDF文件第6页浏览型号MIC74的Datasheet PDF文件第7页浏览型号MIC74的Datasheet PDF文件第8页 
MIC74  
Micrel  
Register Descriptions  
Device Configuration Register  
DEV_CFG  
Output Configuration Register  
OUT_CFG  
D[7]  
D[6]  
D[5]  
D[4]  
D[3]  
D[2]  
D[1]  
D[0]  
D[7]  
D[6]  
D[5]  
D[4]  
D[3]  
D[2]  
D[1]  
D[0]  
Always write as zero.  
FAN  
IE  
OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0  
Power-On Default Value: 0000 0000 , 00  
Power-On Default Value: 0000 0000 , 00  
b
h
h
b
h
h
Interrupts disabled  
Not in Fan Mode  
all outputs open-drain  
Command_byte addess: 0000 0010 , 02  
b
Command_byte addess: 0000 0000 , 00  
Type:  
8-bits, read/write  
b
Type:  
8-bits, read/write  
Bit Name: OUTn  
Bit Name: IE  
Function: Selects output driver configuration of Pn when  
Pn is configured as an output.  
Function: Global interrupt enable.  
Operation: 1 = enabled  
0 = disabled  
Operation: 1 = push-pull  
0 = open-drain  
Notes:  
If Fan Mode is selected, that is, the FAN bit of  
the DEV_CFG register is set to one, P[7:4] are  
automatically configured as open-drain  
Bit Name: FAN  
Function: Selects Fan Mode  
(P[7:4] vs. /FS[2:0], /SHDN)  
outputs. They are then referred to as /FS[2:0]  
and /SHDN. The OUT_CFG register has no  
effect on these I/O bits while in Fan Mode.  
Operation: 1 = Fan Mode  
0 = I/O Mode  
Bit Name: D[2] through D[6]  
Function: Reserved  
Operation: Reserved—always write as zero  
Data Direction Register  
DIR  
Status Register  
STATUS  
D[7]  
D[6]  
D[5]  
D[4]  
D[3]  
D[2]  
D[1]  
D[0]  
D[7]  
D[6]  
D[5]  
D[4]  
S4  
D[3]  
D[2]  
D[1]  
D[0]  
DIR7 DIR6 DIR5 DIR4 DIR3 DIR2 DIR1 DIR0  
S7  
S6  
S5  
S3  
S2  
S1  
S0  
Power-On Default Value: 0000 0000 , 00  
Power-On Default Value: 0000 0000 , 00  
b
h
h
b
h
h
all Pn’s configured as inputs  
no interrupts pending  
Command_byte addess: 0000 0001 , 01  
Command_byte addess: 0000 0011 , 03  
b
b
Type:  
8-bits, read/write  
Type:  
8-bits, read only  
Bit Name: DIRn  
Bit Name: Sn  
Function: Selects data direction, input or output, of Pn  
Function: Flag for Pn input-change event when Pn is  
configured as an input; Sn is set when the  
corresponding input changes state.  
Operation: 1 = output  
0 = input  
Operation: 1 = change occured  
0 = no change occured  
Notes:  
If Fan Mode is selected, that is, the FAN bit of  
the DEV_CFG register is set to one, P[7:4] are  
automatically configured as open-drain  
outputs. They are then referred to as /FS[2:0]  
and /SHDN. The DIR register has no effect on  
these I/O bits while in Fan Mode.  
Notes:  
If Fan Mode is selected, that is, the FAN bit of  
the DEV_CFG register is set to one, P[7:4] are  
automatically configured as open-drain  
outputs. They are then referred to as /FS[2:0]  
and /SHDN. No interrupts of any kind are  
generated by these pins while in Fan Mode.  
All status bits are cleared after any read  
operation is performed on STATUS.  
August 1, 2000  
5
MIC74  
12345678...20

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