MCP23008/MCP23S08
The interrupt output can be configured to activate
under two conditions (mutually exclusive):
1.0
DEVICE OVERVIEW
The MCP23X08 device provides 8-bit, general
purpose, parallel I/O expansion for I2C bus or SPI
applications. The two devices differ in the number of
hardware address pins and the serial interface:
1. When any input state differs from its
corresponding input port register state. This is
used to indicate to the system master that an
input state has changed.
• MCP23008 – I2C interface; three address pins
2. When an input state differs from a preconfigured
register value (DEFVAL register).
• MCP23S08 – SPI interface; two address pins
The MCP23X08 consists of multiple 8-bit configuration
registers for input, output and polarity selection. The
system master can enable the I/Os as either inputs or
outputs by writing the I/O configuration bits. The data
for each input or output is kept in the corresponding
Input or Output register. The polarity of the Input Port
register can be inverted with the Polarity Inversion
register. All registers can be read by the system master.
The Interrupt Capture register captures port values at
the time of the interrupt, thereby saving the condition
that caused the interrupt.
The Power-on Reset (POR) sets the registers to their
default values and initializes the device state machine.
The hardware address pins are used to determine the
device address.
1.1
Pin Descriptions
TABLE 1-1:
PINOUT DESCRIPTION
Pin
Name
PDIP/S
OIC
Pin
SSOP
Function
Type
SCL/SCK
SDA/SI
A2/SO
1
2
3
1
2
3
I
Serial clock input.
I/O Serial data I/O (MCP23008)/Serial data input (MCP23S08).
I/O Hardware address input (MCP23008)/Serial data output (MCP23S08).
A2 must be biased externally.
A1
4
5
4
5
I
I
Hardware address input. Must be biased externally.
Hardware address input. Must be biased externally.
External reset input
A0
RESET
NC/CS
INT
6
6
I
7
7
I
No connect (MCP23008)/External chip select input (MCP23S08).
Interrupt output. Can be configured for active-high, active-low or open-drain.
Ground.
8
8
O
P
VSS
9
9
GP0
10
12
I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
GP1
GP2
GP3
GP4
GP5
GP6
GP7
11
12
13
14
15
16
17
18
13
14
15
16
17
18
19
I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
VDD
N/C
20
P
Power.
10, 11
© 2005 Microchip Technology Inc.
DS21919B-page 3