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MCM72BB64SG66 PDF预览

MCM72BB64SG66

更新时间: 2024-09-29 22:16:43
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
14页 256K
描述
256KB and 512KB BurstRAM Secondary Cache Module for Pentium

MCM72BB64SG66 数据手册

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Order this document  
by MCM72BB32/D  
SEMICONDUCTOR TECHNICAL DATA  
MCM72BB32  
MCM72BB64  
256KB and 512KB BurstRAM  
Secondary Cache Module for  
Pentium  
TheMCM72BB32SGandMCM72BB64SGaredesignedtoprovideaburstable,  
high performance, 256K/512K L2 cache for the Pentium microprocessor. The  
modules are configured as 32K x 72 and 64K x 72 bits in a 160 pin card edge  
memory module. Each module uses four of Motorola’s MCM67B518 or  
MCM67B618 BiCMOS BurstRAMs.  
160–LEAD  
CARD EDGE  
CASE 1113–01  
TOP VIEW  
1
Bursts canbeinitiatedwitheitheraddressstatusprocessor(ADSP) or address  
status controller (ADSC). Subsequent burst addresses are generated internal to  
the BurstRAM by the burst advance (ADV) input pin.  
Write cycles are internally self timed and are initiated by the rising edge of the  
clock (K) input. Eight write enables are provided for byte write control.  
The cache family is designed to interface with popular Pentium cache  
controllers with on board tag.  
PD0 – PD2 are reserved for density identification.  
Pentium–style Burst Counter on Board  
160 Pin Card Edge Module  
42  
43  
Single 5 V ± 5% Power Supply  
All Inputs and Outputs are TTL Compatible  
Three State Outputs  
Byte Parity  
Byte Write Capability  
Fast Module Clock Rates: 66 MHz, 60 MHz  
Decoupling Capacitors for each Fast Static RAM  
High Quality Multi–Layer FR4 PWB With Separate Power and Ground Planes  
I/Os are 3.3 V Compatible  
80  
Burndy Connector, Part Number: CELP2X80SC3Z48  
BurstRAM is a trademark of Motorola.  
Pentium is a trademark of Intel Corp.  
REV 1  
5/95  
Motorola, Inc. 1995  

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