Datasheet > MCF5485CVF200

MCF5485CVF200

更新时间： 2024-09-29 04:40:51

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
96页	1899K
描述
Microprocessor

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MCF5485CVF200 数据手册

Advance Information

MCF5485EC/D

Rev. 1.1, 2/2004

MCF548x Integrated

Microprocessor

Hardware Specifications

The MCF548x is a highly-integrated implementation of the ColdFire family of reduced

instruction set computing (RISC) microprocessors. This document describes pertinent

electrical and physical characteristics of the MCF548x family: the MCF5480, MCF5481,

MCF5482, MCF5483, MCF5484, and MCF5485.

This document contains the following topics:

Topic

Page

Section 1.1, “MCF548x Family Overview”

Section 1.2, “MCF548x Block Diagram”

Section 1.3, “MCF548x Family Products”

Section 1.4, “MCF548x Family Features”

Section 1.5, “Signal Description”

Section 1.6, “Chip Configuration”

Section 1.7, “Design Recommendations”

Section 1.8, “MCF5485/5484 Pinout”

Section 1.9, “MCF5483/5482 Pinout”

Section 1.10, “MCF5481/5480 Pinout”

Section 1.11, “Mechanicals”

Section 1.12, “Ordering Information”

Section 1.13, “Device/Family Documentation List”

Section 1.14, “Document Revision History”

Appendix A, “Preliminary Electrical Characteristics”

To locate any published errata or updates for this document, refer to the web site at

http://motorola.com/semiconductors.

1.1 MCF548x Family Overview

The MCF548x family is based on the ColdFire V4e core, a complex which comprises the

ColdFire V4 central processor unit (CPU), an enhanced multiply-accumulate unit (EMAC), a

memory management unit (MMU), a double-precision floating point unit (FPU) conforming

to standard IEEE-754, and controllers for caches and local data memories. The MCF548x

family is capable of performing at an operating frequency of up to 200 MHz or 308 MIPS

(Dhrystone 2.1).

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

12 3 4 5 6 7...96

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