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MC33879TEK

更新时间: 2024-01-18 18:37:05
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
26页 417K
描述
Switch, Congifurable 8 Channels, SOIC 32

MC33879TEK 数据手册

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Document Number: MC33879  
Rev. 11.0, 7/2016  
NXP Semiconductors  
Technical Data  
Configurable octal serial switch with  
open load detect current disable  
33879  
33879A  
The 33879 device is an 8-output hardware configurable, high-side/low-side  
switch with 16-bit serial input control using the serial peripheral interface (SPI).  
Two of the outputs may be controlled directly via a microcontroller for pulse-  
width modulation (PWM) applications. The 33879 incorporates SMARTMOS  
technology, with CMOS logic, bipolar/MOS analog circuitry, and DMOS power  
MOSFETs. The 33879 controls various inductive, incandescent, or LED loads by  
directly interfacing with a microcontroller. The circuit’s innovative monitoring and  
protection features include very low standby currents, cascade fault reporting,  
internal +45 V clamp voltage for low-side configuration, -20 V high-side  
configuration, output specific diagnostics, and independent overtemperature  
protection.  
HIGH-SIDE/ LOW-SIDE SWITCH  
Features  
• Designed to operate 5.5 V < VPWR < 27.5 V  
EK SUFFIX (PB-FREE)  
98ARL10543D  
• 16-bit SPI for control and fault reporting, 3.3 V/5.0 V compatible  
• Outputs are current limited (0.6 to 1.2 A) to drive incandescent lamps  
• Output voltage clamp, +45 V (low-side) and -20 V (high-side) during  
inductive switching  
32-PIN SOICW  
• On/Off control of open load detect current (LED application)  
• Internal reverse battery protection on VPWR  
• Loss of ground or supply will not energize loads or damage IC  
• Maximum 5.0 μA IPWR standby current at 13 V VPWR  
• RDS(ON) of 0.75 Ω at 25 °C typical  
Applications  
• Solenoids  
• Relays  
• Actuators  
• Stepper motors  
• Brush DC motors  
• Incandescent lamps  
• Short-circuit detect and current limit with automatic retry  
• Independent overtemperature protection  
V
V
PWR  
BAT  
5.0 V  
33879  
VPWR  
D1  
D2  
D3  
D4  
S1  
S2  
VDD  
High-side Drive  
MCU  
A0  
EN  
DI  
S3  
S4  
MOSI  
SCLK  
CS  
H-Bridge Configuration  
M
SCLK  
CS  
V
V
D5  
BAT  
BAT  
D6  
D7  
D8  
S5  
S6  
S7  
S8  
MISO  
PWM1  
PWM2  
D0  
IN5  
Low-side Drive  
IN6  
GND  
Figure 1. 33879 simplified application diagram  
© 2016 NXP B.V.  

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