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MC100EP56 PDF预览

MC100EP56

更新时间: 2024-02-14 01:04:10
品牌 Logo 应用领域
安森美 - ONSEMI 复用器
页数 文件大小 规格书
10页 94K
描述
3.3V / 5VECL Dual Differential 2:1 Multiplexer

MC100EP56 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN, LCC20,.16SQ,20针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.5
其他特性:NECL MODE OPERATING RANGE: VCC = 0 V WITH VEE = -3.0 V TO -5.5 V系列:100E
JESD-30 代码:S-XQCC-N20JESD-609代码:e3
长度:4 mm逻辑集成电路类型:MULTIPLEXER
湿度敏感等级:1功能数量:2
输入次数:2输出次数:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:SERIES-RESISTOR
输出极性:COMPLEMENTARY封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC20,.16SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:-4.5 V最大电源电流(ICC):80 mA
Prop。Delay @ Nom-Sup:0.5 ns传播延迟(tpd):0.47 ns
认证状态:Not Qualified座面最大高度:1 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mm

MC100EP56 数据手册

 浏览型号MC100EP56的Datasheet PDF文件第2页浏览型号MC100EP56的Datasheet PDF文件第3页浏览型号MC100EP56的Datasheet PDF文件第4页浏览型号MC100EP56的Datasheet PDF文件第5页浏览型号MC100EP56的Datasheet PDF文件第6页浏览型号MC100EP56的Datasheet PDF文件第7页 
MC10EP56, MC100EP56  
3.3V / 5VꢀECL Dual  
Differential 2:1 Multiplexer  
The MC10/100EP56 is a dual, fully differential 2:1 multiplexer. The  
differential data path makes the device ideal for multiplexing low  
skew clock or other skew sensitive signals. Multiple V pins are  
provided.  
BB  
http://onsemi.com  
The V pin, an internally generated voltage supply, is available to  
this device only. For single−ended input conditions, the unused  
BB  
MARKING  
DIAGRAMS*  
differential input is connected to V as a switching reference voltage.  
BB  
V
BB  
may also rebias AC coupled inputs. When used, decouple V  
BB  
20  
and V via a 0.01 mF capacitor and limit current sourcing or sinking  
CC  
20  
to 0.5 mA. When not used, V should be left open.  
BB  
xxxx  
EP56  
ALYW  
1
The device features both individual and common select inputs to  
address both data path and random logic applications.  
The 100 Series contains temperature compensation.  
TSSOP−20  
DT SUFFIX  
CASE 948E  
1
360 ps Typical Propagation Delays  
20  
Maximum Frequency > 3 GHz Typical  
PECL Mode Operating Range: V = 3.0 V to 5.5 V  
CC  
20  
MC100EP56  
AWLYYWW  
with V = 0 V  
EE  
1
NECL Mode Operating Range: V = 0 V  
CC  
SO−20  
DW SUFFIX  
CASE 751D  
with V = −3.0 V to −5.5 V  
EE  
1
Open Input Default State  
Safety Clamp on Inputs  
Separate and Common Select  
Q Output Will Default LOW with Inputs Open or at V  
xxx  
A
= MC10 or 100  
= Assembly Location  
L, WL = Wafer Lot  
Y, YY = Year  
EE  
V Outputs  
W, WW = Work Week  
BB  
*For additional information, see Application Note  
AND8002/D  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC10EP56DT  
TSSOP−20  
75 Units/Rail  
MC10EP56DTR2 TSSOP−20 2500 Tape & Reel  
MC100EP56DT TSSOP−20 75 Units/Rail  
MC100EP56DTR2 TSSOP−20 2500 Tape & Reel  
MC100EP56DW  
SO−20  
SO−20  
38 Units/Rail  
MC100EP56DWR2  
1000 Tape & Reel  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
January, 2004 − Rev. 12  
MC10EP56/D  

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