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MAXQ1850-BNS+ PDF预览

MAXQ1850-BNS+

更新时间: 2024-02-23 13:50:44
品牌 Logo 应用领域
美信 - MAXIM 控制器
页数 文件大小 规格书
3页 56K
描述
Secure Cryptographic Controller with Rapid Zeroization Technology

MAXQ1850-BNS+ 技术参数

是否Rohs认证: 符合生命周期:Not Recommended
零件包装代码:BGA包装说明:FBGA, BGA49,7X7,32
针数:49Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.73
具有ADC:NO地址总线宽度:
位大小:32CPU系列:MAXQ30
最大时钟频率:12 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:S-PBGA-B49长度:7 mm
I/O 线路数量:16端子数量:49
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:FBGA封装等效代码:BGA49,7X7,32
封装形状:SQUARE封装形式:GRID ARRAY, FINE PITCH
电源:3.3 V认证状态:Not Qualified
RAM(字节):8192ROM(单词):262144
ROM可编程性:FLASH速度:16 MHz
子类别:Microcontrollers标称供电电压:3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM宽度:7 mm
Base Number Matches:1

MAXQ1850-BNS+ 数据手册

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ABRIDGED DATA SHEET  
Rev 0; 1/09  
Secure Cryptographic Controller  
with Rapid Zeroization Technology  
MAXQ1850  
General Description  
Features  
The MAXQ1850 is a low-power, 32-bit RISC device  
designed for electronic commerce, banking, and data  
security systems. It combines high-performance, single-  
cycle processing, sophisticated tamper-detection technol-  
ogy, and advanced cryptographic hardware to provide  
industry-leading data security and secret key protection.  
High-Performance, Low-Power, 32-Bit MAXQ30  
RISC Core  
Single 3.3V Supply Enables Low Power/Flexible  
Interfacing  
DC to 16MHz Code Execution Across Entire  
Physical security mechanisms include environmental  
sensors that detect out of range voltage or temperature  
conditions, responding with an instantaneous zeroiza-  
tion of critical data. Four self-destruct inputs are provid-  
ed for additional tamper response. An internal shield  
over the silicon provides protection from microprobe  
attacks. A high-speed internal ring oscillator is provided  
to thwart attacks that rely on controlling the clock rate of  
the chip. To protect data, the MAXQ1850 integrates sev-  
eral high-speed, analysis-resistant encryption engines.  
Algorithms supported in hardware include AES (128-,  
192-, and 256-bit), DES, triple DES (2-key and 3-key),  
ECDSA (160-, 192-, and 256-bit keys), DSA, RSA (up to  
2048 bits), SHA-1, SHA-224, and SHA-256. The  
advanced security features of the MAXQ1850 are  
designed to meet the stringent requirements of regula-  
tions such as ITSEC E3 High, FIPS 140-2 Level 3, and  
the Common Criteria certifications.  
Operating Range  
Up to 65MHz Cryptography Engine Execution to  
Reduce Processing Time  
On-Chip 2x/4x Clock Multiplier  
33 Instructions  
16-Bit Instruction Word, 32-Bit Internal Data Bus  
16 x 32-Bit Accumulators  
Up to 16 General-Purpose I/O Pins  
5V Tolerant I/O  
Virtually Unlimited Software Stack  
Optimized for C-Compiler (High-Speed/Density Code)  
Memory Features  
Security Features  
The MAXQ1850 includes 256KB of flash memory and  
8KB of secure, battery-backed data SRAM. Several  
communication protocols are supported with hardware  
engines, including ISO 7816 for smart card applications,  
USB (slave interface with four end-point buffers), an RS-  
232 universal synchronous/asynchronous receiver-  
transmitter (USART), an SPI™ interface (master or slave  
mode support), and up to 16 general-purpose I/O pins.  
Other peripherals supported on the MAXQ1850 include  
a true hardware random-number generator (RNG), a  
real-time clock (RTC), a programmable watchdog timer,  
and flexible 16-bit timers that support capture, compare,  
and pulse-width modulation (PWM) operations.  
Additional Peripherals  
Low-Power Consumption  
See the Detailed Features section for complete list of features.  
Ordering Information  
PART  
TEMP RANGE  
PIN-PACKAGE  
MAXQ1850-BNS+  
0°C to +70°C  
40 TQFN-EP*  
Note: A chip-scale BGA (CSBGA) version of the MAXQ1850 is  
in development. Contact the factory for more information.  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
*EP = Exposed pad.  
Applications  
Electronic Commerce  
EMV™ Banking  
Pay-per-Play  
Certificate Authentication  
Pin Configuration and Selector Guide appear at end of data  
sheet.  
Secure Access Control  
Secure Data Storage  
Electronic Signature  
Generation  
EMV is a trademark owned by EMVCo LLC.  
SPI is a trademark of Motorola, Inc.  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be  
simultaneously available through various sales channels. For information about device errata, go to: www.maxim-ic.com/errata.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  

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