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MAX693A

更新时间: 2024-09-30 14:57:27
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亚德诺 - ADI 监控微处理器
页数 文件大小 规格书
17页 2381K
描述
微处理器监控电路

MAX693A 数据手册

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Click here for production status of specific part numbers.  
MAX691A/MAX693A/  
MAX800L/MAX800M  
Microprocessor Supervisory Circuits  
General Description  
Features  
● 200ms Power-OK/Reset Timeout Period  
The MAX691A/MAX693A/MAX800L/MAX800M micro-  
processor (μP) supervisory circuits are pin-compatible  
upgrades to the MAX691, MAX693, and MAX695. They  
improve performance with 30μA supply current, 200ms  
typ reset active delay on power-up, and 6ns chip-enable  
propagation delay. Features include write protection  
of CMOS RAM or EEPROM, separate watchdog out-  
puts, backup-battery switchover, and a RESET output  
● 1μA Standby Current, 30μA Operating Current  
● On-Board Gating of Chip-Enable Signals, 10ns max  
Delay  
®
● MaxCap or SuperCap Compatible  
● Guaranteed RESET Assertion to V  
● Voltage Monitor for Power-Fail or Low-Battery  
Warning  
= +1V  
CC  
that is valid with V  
down to 1V. The MAX691A/  
CC  
MAX800L have a 4.65V typical reset-threshold voltage,  
and the MAX693A/MAX800Ms’ reset threshold is 4.4V  
typical. The MAX800L/MAX800M guarantee power-fail  
accuracies to ±2%.  
● Power-Fail Accuracy Guaranteed to ±2%  
(MAX800L/M)  
● Available in 16-Pin Narrow SO, Plastic DIP, and  
TSSOP Packages  
Ordering Information  
Applications  
● Computers  
● Controllers  
PIN-  
PACKAGE  
PART  
TEMP RANGE  
MAX691ACUE  
MAX691ACSE  
MAX691ACWE  
MAX691ACPE  
MAX691AC/D  
MAX691AEUE  
MAX691AESE  
MAX691AEWE  
MAX691AEPE  
-0°C to +70°C 16 TSSOP  
-0°C to +70°C 16 Narrow SO  
-0°C to +70°C 16 Wide SO  
-0°C to +70°C 16 Plastic DIP  
-0°C to +70°C Dice*  
-0°C to +70°C 16 TSSOP  
-40°C to +85°C 16 Narrow SO  
-40°C to +85°C 16 Wide SO  
-40°C to +85°C 16 Plastic DIP  
● Intelligent Instruments  
● Critical μP Power Monitoring  
Typical Operating Circuit  
5V  
REGULATOR  
+8V  
0.1µF  
Ordering Information continued at end of data sheet.  
*Dice are specified at T = +25°C, DC parameters only.  
3
5
A
1N4148  
0.47F*  
V
BATT ON  
Devices in PDIP, SO, and TSSOP packages are available in  
both leaded and lead-free packaging. Specify lead free by add-  
ing the + symbol at the end of the part number when ordering.  
Lead free not available for CERDIP package.  
CC  
2
V
OUT  
1
VBATT  
12  
CE OUT  
CMOS RAM  
Pin Configuration  
MAX691A  
13  
11  
9
4
7
MAX693A  
MAX800L  
MAX800M  
ADDRESS  
DECODE  
CE IN  
TOP VIEW  
PFI  
VBATT  
RESET  
RESET  
WDO  
CE IN  
CE OUT  
WDI  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
GND  
A0-A15  
I/O  
µP  
V
OUT  
WDI  
V
CC  
OSC IN  
MAX691A  
MAX693A  
MAX800L  
MAX800M  
NO  
10  
15  
GND  
PFO  
NMI  
CONNECTION  
8
OSC SEL  
BATT ON  
LOW LINE  
OSC IN  
RESET  
RESET  
LOW LINE WDO  
6
14  
AUDIBLE  
ALARM  
PFO  
OSC SEL  
PFI  
*MaxCap  
SYSTEM STATUS INDICATORS  
DIP/SO/TSSOP  
MaxCap is a registered trademark of Kanthal Globar, Inc.  
19-0094; Rev 14; 4/18  

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