Datasheet > MAX6865UK31D4L+

MAX6865UK31D4L+

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
美信 - MAXIM		信息通信管理光电二极管
页数	文件大小	规格书
17页	489K
描述
Power Supply Management Circuit, Fixed, 1 Channel, BICMOS, PDSO5, LEAD FREE, MO-178AA, SOT-23, 5 PIN

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MAX6865UK31D4L+ 数据手册

Nanopower µP Supervisory Circuits with

Manual Reset and Watchdog Timer

MAX6861/MAX6862/MAX6863 Pin Description

NAME

FUNCTION

MAX6861/

MAX6863

MAX6862

Reset Timeout Select Input. Connect CT low to select the D1 reset timeout output

period (see Tables 1 and 4). Connect CT high (normally V ) to select the D3

reset timeout period.

GND

Ground

Active-Low Manual Reset Input. Drive MR low to initiate a reset. The reset output

remains asserted while MR is held low and for the reset timeout period after MR

transitions high. Leave MR unconnected or connect to V

if unused. MR is

internally pulled up to V

through 10kΩ.

Active-Low Open-Drain or Push-Pull Reset Output. RESET transitions from high to

low when V drops below the selected reset threshold or MR is pulled low.

—

RESET

RESET remains low for the reset timeout period after V

exceeds the device

reset threshold and MR deasserts. Push-pull RESET outputs are referenced to

. Open-drain RESET outputs require an external pullup resistor.

Supply Voltage. Input for V

a 0.1µF capacitor to GND.

reset monitor. For noisy systems, bypass V

with

Active-High Push-Pull Reset Output. RESET transitions from low to high when

drops below the selected reset threshold or MR is pulled low. RESET

—

RESET

remains high for the reset timeout period after V exceeds the device reset

threshold and MR deasserts. RESET is referenced to V

_______________________________________________________________________________________

1...4 5 678 9 10...17

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