Datasheet > MAX6442KANRYD3-T

MAX6442KANRYD3-T

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
美信 - MAXIM		信息通信管理光电二极管
页数	文件大小	规格书
14页	250K
描述
Power Supply Support Circuit, Fixed, 2 Channel, BICMOS, PDSO8, SOT-23, 8 PIN

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MAX6442KANRYD3-T 数据手册

Low-Power, Single-/Dual-Level Battery Monitors

with Hysteresis and Integrated µP Reset

ELECTRICAL CHARACTERISTICS (continued)

BATT

= 1.2V to 5.5V, V = 1.2V to 5.5V, T = -40°C to +85°C, unless otherwise specified. Typical values are at T = +25°C.) (Note1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

LBO, LBOL, LBOH, LBOLH

Timeout Period

rising above threshold

150

225

300

LBOP

BATT

LBO, LBOL, LBOH, LBOLH

Delay Time

falling below threshold

100

µs

LBOD

or V ) ≥ 1.2V, I

= 50µA,

BATT

SINK

0.3

asserted low

(V or V ) ≥ 1.6V, I

asserted low

= 100µA,

= 1.2mA,

= 3.2mA,

BATT

LBO, LBOL, LBOH, LBOLH

Output Low

(Open Drain)

(V or V ) ≥ 2.7V, I

asserted low

BATT

(V or V ) ≥ 4.5V, I

asserted low

BATT

LBO, LBOL, LBOH, LBOLH

Output Open-Drain Leakage

Current

Output deasserted

500

LKG

MAX64_ _ _ _ _ _ T

MAX64_ _ _ _ _ _ S

MAX64_ _ _ _ _ _ R

MAX64_ _ _ _ _ _ Z

MAX64_ _ _ _ _ _ Y

MAX64_ _ _ _ _ _ W

MAX64_ _ _ _ _ _ V

3.000

2.850

2.550

2.250

2.125

1.620

1.530

3.075

2.925

2.625

2.313

2.188

1.665

1.575

0.3

3.150

3.000

2.700

2.375

2.250

1.710

1.620

Reset Threshold

Reset Hysteresis

falling at 10mV/µs from (V + 100mV)

to RESET Delay

µs

to (V - 100mV)

MAX64_ _ _ _ _ _ _ D3

MAX64_ _ _ _ _ _ _ D7

150

225

300

to RESET Timeout Period

1200

1800

2400

0.3 x V

MR Input Voltage

0.7 x V

MR Minimum Pulse Width

MR Glitch Rejection

µs

Ω

MPW

100

200

225

1500

225

MR to RESET Delay

MR Reset Timeout Period

MR Pullup Resistance

MR Rising Debounce Period

150

750

150

300

2250

300

MRP

MR to V

(Note 3)

DEB

_______________________________________________________________________________________

1 2 345 6 7...14

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