MAX6316–MAX6322
5-Pin μP Supervisory Circuits with
Watchdog and Manual Reset
is erased and processing begins from scratch. If, on the
other hand, RESET is high after a delay of two external-
clock cycles, the processor knows that it caused the reset
itself and can jump to a different vector and use stored-
state information to determine what caused the reset.
Bidirectional RESET Output
The
MAX6316M/MAX6318MH/MAX6319MH
are
designed to interface with μPs that have bidirectional
reset pins, such as the Motorola 68HC11. Like an open-
drain output, these devices allow the μP or other devices
to pull the bidirectional reset (RESET) low and assert a
reset condition. However, unlike a standard open-drain
output, it includes the commonly specified 4.7kΩ pullup
resistor with a P-channel active pullup in parallel.
A problem occurs with faster μPs; two external-clock
cycles are only 500ns at 4MHz. When there are several
devices on the reset line, and only a passive pullup resis-
tor is used, the input capacitance and stray capacitance
can prevent RESET from reaching the logic high state
This configuration allows the MAX6316M/MAX6318MH/
MAX6319MH to solve a problem associated with μPs that
have bidirectional reset pins in systems where several
devices connect to RESET (Figure 3). These μPs can
often determine if a reset was asserted by an external
device (i.e., the supervisor IC) or by the μP itself (due to
a watchdog fault, clock error, or other source), and then
jump to a vector appropriate for the source of the reset.
However, if the μP does assert reset, it does not retain the
information, but must determine the cause after the reset
has occurred.
(0.85 x V ) in the time allowed. If this happens, all resets
CC
will be interpreted as external. The μP output stage is
guaranteed to sink 1.6mA, so the rise time can not be
reduced considerably by decreasing the 4.7kΩ internal
pullup resistance. See Bidirectional Pullup Characteristics
in the Typical Operating Characteristics.
The MAX6316M/MAX6318MH/MAX6319MH overcome
this problem with an active pullup FET in parallel with the
4.7kΩ resistor (Figures 4 and 5). The pullup transistor
holds RESET high until the μP reset I/O or the supervi-
sory circuit itself forces the line low. Once RESET goes
The following procedure describes how this is done in
the Motorola 68HC11. In all cases of reset, the μP pulls
RESET low for about four external-clock cycles. It then
releases RESET, waits for two external-clock cycles, then
checks RESET’s state. If RESET is still low, the μP con-
cludes that the source of the reset was external and, when
RESET eventually reaches the high state, it jumps to the
normal reset vector. In this case, stored-state information
below V
, a comparator sets the transition edge flip-
PTH
flop, indicating that the next transition for RESET will be
low to high. When RESET is released, the 4.7kΩ resistor
pulls RESET up toward V . Once RESET rises above
CC
V
but is below (0.85 x V ), the active P-channel
PTH
CC
pullup turns on. Once RESET rises above (0.85 x V
)
CC
or the 2μs one-shot times out, the active pullup turns
off. The parallel combination of the 4.7kΩ pullup and the
V
CC
V
CC
WDI*
MR**
4.7kΩ
68HC11
RESET
CIRCUITRY
RESET
RESET
RESET
RESET
CIRCUITRY
RESET***
C
IN
C
STRAY
C
IN
MAX6316M
MAX6318MH
MAX6319MH
C
IN
OTHER DEVICES
*
**
MAX6316M/MAX6318MH
MAX6316M/MAX6319MH
***
ACTIVE-HIGH PUSH/PULL MAX6318MH/MAX6319MH
Figure 3. MAX6316M/MAX6318MH/MAX6319MH Supports Additional Devices on the Reset Bus
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│ 7
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