MAX6316–MAX6322
5-Pin μP Supervisory Circuits with
Watchdog and Manual Reset
V
CC
MAX6316–MAX6322
RESET
(ALL EXCEPT MAX6317)
RESET
GENERATOR
RESET
(ALL EXCEPT
MAX6316/MAX6320P)
V
CC
1.23V
52kΩ
MR
(ALL EXCEPT
MAX6318/MAX6321)
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
TIMER
WDI
(ALL EXCEPT
MAX6319/MAX6322)
52kΩ
GND
Figure 1. Functional Diagram
within the watchdog timeout period (t ). Reset remains
WD
Detailed Description
asserted for the specified reset active timeout period (t
)
RP
A microprocessor’s (μP) reset input starts or restarts the
μP in a known state. The reset output of the MAX6316–
MAX6322 μP supervisory circuits interfaces with the
reset input of the μP, preventing code-execution errors
during power-up, power-down, and brownout condi-
tions (see the Typical Operating Circuit). The MAX6316/
MAX6317/MAX6318/MAX6320/MAX6321 are also capa-
ble of asserting a reset should the μP become stuck in
an infinite loop.
after V
rises above the reset threshold, after MR transi-
CC
tions low to high, or after the watchdog timer asserts the
reset (MAX6316_/MAX6317H/MAX6318_H/MAX6320P/
MAX6321HP). After the reset active timeout period (t
)
RP
expires, the reset output deasserts, and the watchdog
timer restarts from zero (Figure 2).
V
CC
Reset Output
V
RST
V
RST
1V
1V
The
MAX6316L/MAX6318LH/MAX6319LH
fea-
GND
ture an active-low reset output, while the MAX6317H
MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HP
feature an active-high reset output. RESET is guaranteed
to be a logic low and RESET is guaranteed to be a logic
t
RP
RP
t
RD
RESET
t
t
RESET
GND
RD
high for V
down to 1V.
CC
The MAX6316–MAX6322 assert reset when V
is
CC
below the reset threshold (V
low (MAX6316_/MAX6317H/MAX6319_H/MAX6320P/
MAX6322HP only), or if the WDI pin is not serviced
), when MR is pulled
RST
Figure 2. Reset Timing Diagram
Maxim Integrated
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