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MAX3645ESE-T

更新时间： 2024-02-27 19:30:53
品牌 Logo 应用领域
美信 - MAXIM ATM异步传输模式电信光电二极管电信集成电路
页数 文件大小 规格书
10页 262K
描述
Support Circuit, 1-Func, Bipolar, PDSO16, 0.150 INCH, MS-012AC, SOIC-16

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MAX3645ESE-T 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：0.150 INCH, MS-012AC, SOIC-16针数：16
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.42应用程序：SONET
JESD-30 代码：R-PDSO-G16JESD-609代码：e0
长度：9.9 mm功能数量：1
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：245电源：3.3/5 V
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：ATM/SONET/SDH ICs最大压摆率：0.027 mA
标称供电电压：3.3 V表面贴装：YES
技术：BIPOLAR电信集成电路类型：ATM/SONET/SDH SUPPORT CIRCUIT
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3.9 mmBase Number Matches：1

MAX3645ESE-T 数据手册

 浏览型号MAX3645ESE-T的Datasheet PDF文件第4页浏览型号MAX3645ESE-T的Datasheet PDF文件第5页浏览型号MAX3645ESE-T的Datasheet PDF文件第6页浏览型号MAX3645ESE-T的Datasheet PDF文件第8页浏览型号MAX3645ESE-T的Datasheet PDF文件第9页浏览型号MAX3645ESE-T的Datasheet PDF文件第10页 
+2.97V to +5.5V, 125Mbps to 200Mbps Limiting  
Amplifier with Loss-of-Signal Detector  
V
CC  
TH  
CSD  
V
CC  
V
- 0.87V  
CC  
LOS  
LOS  
4.8kΩ  
4.8kΩ  
POWER  
DETECTOR  
MAX3645  
DIN+  
DIN-  
DOUT+  
DOUT-  
DIS  
DIN+  
DIN-  
OFFSET  
CORRECTION  
ESD  
STRUCTURES  
C
INT  
CAZ1  
CAZ2  
Figure 2. Functional Diagram  
Figure 3. Equivalent Data Input Circuit  
The external autozero capacitor (C ), in parallel with  
detector time constant, which determines the LOS  
assert/deassert time. With C = 1nF the assert/  
deassert time is in the range of 2.3µs to 8ꢀµs. This pro-  
vides a long enough time constant to avoid false trig-  
gering due to variations in mark density.  
AZ  
internal capacitance (C ), determines the time con-  
INT  
SD  
stant of the DC offset correction loop. With C = ꢀ.1µF  
AZ  
(recommended), the -3dB frequency cutoff of the signal  
path is typically ꢀ.5kHz.  
Power Detector and LOS Indicators  
Disable Function  
When the DIS input is forced high, the disable function  
is enabled, which holds DOUT+ low and DOUT- high.  
The disable function is used to prevent the data outputs  
from toggling due to noise when no signal is present.  
The LOS output can be connected to the DIS input for  
automatic squelch.  
The external resistor R sets the gain of the first limit-  
TH  
ing stage. This gain setting controls the threshold at  
which the power detector indicates an LOS condition.  
Power detection is accomplished by rectifying and low-  
pass filtering the data signal, then comparing it to the  
programmed threshold voltage. A hysteresis of 2dB  
prevents the LOS output from chattering when the input  
signal is near the threshold.  
PECL Output Terminations  
The proper termination for a PECL output is 5ꢀΩ to  
PECL Output Buffer  
The data outputs (DOUT+, DOUT-) and the loss-of-sig-  
nal outputs (LOS+, LOS-) are PECL outputs. The equiv-  
alent PECL output circuit is shown in Figure 4.  
(V  
- 2V), but other standard termination techniques  
CC  
can be used. For more information on PECL termina-  
tions and how to interface with other logic families, refer  
to Maxim Application Note HFAN-01.0: Introduction to  
LVDS, PECL, and CML.  
Applications Information  
Layout Considerations  
For best performance, use good high-frequency layout  
techniques. Filter power supplies, keep ground con-  
nections short, and use multiple vias where possible.  
Power-supply decoupling should be placed close to  
Programming LOS Assert/Deassert Levels  
The appropriate value of R  
is determined by using  
TH  
the Loss-Of-Signal Threshold vs. R  
graph in the  
TH  
Typical Operating Characteristics.  
the V  
pins. Minimize the distance from the preampli-  
CC  
LOS Time Constant  
fier and use controlled-impedance transmission lines to  
interface with the outputs when possible.  
The lowpass filter of the power detector comprises a  
2ꢀkΩ on-chip resistor (R ) and an external capacitor  
SD  
(C ). The C  
capacitor value determines the power-  
SD  
SD  
_______________________________________________________________________________________  
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