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MAX3272EGP

更新时间： 2024-01-07 19:07:51
品牌 Logo 应用领域
美信 - MAXIM ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路放大器异步传输模式
页数 文件大小 规格书
14页 624K
描述
+3.3V, 2.5Gbps Low-Power Limiting Amplifiers

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中文翻译

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MAX3272EGP 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：QFN
包装说明：4 X 4 MM, 0.90 MM HEIGHT, MO-220, QFN-20针数：20
Reach Compliance Code：unknown风险等级：5.9
Is Samacsys：NJESD-30 代码：S-XQCC-N20
JESD-609代码：e0长度：4 mm
湿度敏感等级：1功能数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：240
认证状态：COMMERCIAL座面最大高度：1 mm
标称供电电压：3.3 V表面贴装：YES
技术：BIPOLAR电信集成电路类型：SUPPORT CIRCUIT
温度等级：INDUSTRIAL端子面层：TIN LEAD
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：20
宽度：4 mmBase Number Matches：1

MAX3272EGP 数据手册

 浏览型号MAX3272EGP的Datasheet PDF文件第2页浏览型号MAX3272EGP的Datasheet PDF文件第3页浏览型号MAX3272EGP的Datasheet PDF文件第4页浏览型号MAX3272EGP的Datasheet PDF文件第6页浏览型号MAX3272EGP的Datasheet PDF文件第7页浏览型号MAX3272EGP的Datasheet PDF文件第8页 
+3.3V, 2.5Gbps Low-Power  
Limiting Amplifiers  
Typical Operating Characteristics (continued)  
(V  
= +3.3V, T = +25°C, unless otherwise noted.)  
A
CC  
COMMON-MODE REJECTION RATIO  
vs. FREQUENCY  
LOS ASSERT AND DEASSERT LEVELS  
vs. DATA RATE  
19.0  
18.5  
18.0  
17.5  
17.0  
16.5  
16.0  
15.5  
15.0  
12  
10  
8
DEASSERT  
6
ASSERT  
4
23  
2
- 1 PRBS PATTERN  
= 20kΩ  
2
R
TH  
C
= 0.1µF  
IN  
0
100k  
1M  
10M  
100M  
0
500  
1000  
1500  
2000  
2500  
FREQUENCY (Hz)  
DATA RATE (Mbps)  
Pin Description  
PIN  
NAME  
FUNCTION  
1, 4, 17  
GND  
IN+  
IN-  
Supply Ground  
2
3
5
Noninverted Input Signal  
Inverted Input Signal  
TH  
Loss-of-Signal Threshold Pin. Resistor to ground sets the LOS threshold.  
Power Supply  
6, 12, 15, 20  
7
V
CC  
CLOS  
LOS Time-Constant Capacitor Connection. For SONET applications, C  
= 0.01µF is recommended.  
CLOS  
Squelch Input. The squelch function is disabled when SQUELCH is not connected or set to TTL low  
level. When SQUELCH is set to TTL high level and LOS is asserted, the data outputs (OUT+, OUT-)  
are forced to static levels.  
8
9
SQUELCH  
LOS  
Noninverted Loss-of-Signal Output. LOS is asserted TTL high when the signal drops below the assert  
threshold set by the TH input. The MAX3272 does not have ESD protection on this pin. The  
MAX3272A has ESD protection on this pin.  
Inverted Loss-of-Signal Output. LOS is asserted TTL low when the signal drops below the assert  
threshold set by the TH input. The MAX3272 does not have ESD protection on this pin. The  
MAX3272A has ESD protection on this pin.  
10  
11  
LOS  
Output Current Level. When this pin is not connected, the CML output current is approximately  
16mA. When this pin is connected to ground, the output current increases to about 20mA.  
LEVEL  
13  
14  
OUT-  
Inverted Data Output  
OUT+  
Noninverted Data Output  
Output Polarity Control Input. Connect to GND for an inversion of polarity through the limiting  
16  
18  
19  
EP  
OUTPOL  
CAZ2  
amplifier and connect to V  
for normal operation.  
CC  
Offset-Correction-Loop Capacitor Connection. A capacitor connected between this pin and CAZ1  
extends the time constant of the offset correction loop. Typical value of C is 0.1µF.  
AZ  
Offset-Correction-Loop Capacitor Connection. A capacitor connected between this pin and CAZ2  
extends the time constant of the offset correction loop. Typical value of C is 0.1µF.  
AZ  
CAZ1  
EXPOSED  
PAD  
Connect the exposed paddle to board ground for optimal electrical and thermal performance.  
_______________________________________________________________________________________  
5
12345678...14

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