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MAQ2909CDXXX PDF预览

MAQ2909CDXXX

更新时间： 2024-01-01 03:25:56

品牌	Logo	应用领域
美高森美 - MICROSEMI		/
页数	文件大小	规格书
13页	151K
描述
Micro Peripheral IC,

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技术参数
数据手册

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MAQ2909CDXXX 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.12
Base Number Matches：	1

MAQ2909CDXXX 数据手册

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MA2909/11

Cycle S1 S0 FE PUP µPC REG STK0 STK1 STK2 STK3 Y_OUT

Comment

Pop Stack

Push µPC

Continue

Principal Use

End Loop

Set-up Loop

Continue

End Loop

JSR AR

N

N + 1

N

L

L

L

L

H

L

L

H

L

L

H

L

L

H

L

J

J + 1

J

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

K

R_a

R_b

R_a

J

R_b

R_c

R_b

R_a

R_b

R_b

R_b

R_c

R_b

R_a

R_b

R_b

R_b

R_c

R_b

R_a

R_b

R_b

R_b

R_c

R_b

R_a

R_b

R_b

R_c

R_d

R_c

R_b

R_c

R_c

R_c

R_d

R_c

R_b

R_c

R_c

R_c

R_d

R_c

R_b

R_c

R_c

R_c

R_d

R_c

R_b

R_c

R_c

R_d

R_a

R_d

R_c

R_d

R_d

R_d

R_a

R_d

R_c

R_d

R_d

R_d

R_a

R_d

R_c

R_d

R_d

R_d

R_a

R_d

R_c

R_d

R_d

J

-

J

-

-

-

-

-

-

-

-

-

-

-

-

L

L

H

X

L

N + 1

N

N + 1

N

N + 1

N

J + 1

J

J + 1

J

K + 1

J

-

L

L

R_a

R_a

R_a

R_b

R_a

J

R_a

R_a

R_a

R_b

R_a

J

R_a

R_a

R_a

R_b

R_a

J

J

-

K

-

K

-

K

-

R_a

-

L

H

H

H

L

Pop Stack;

Use AR for Address

Push µPC;

L

H

X

L

N + 1

N

N + 1

N

N + 1

N

N + 1

N

K + 1

J

K + 1

J

R_a+ 1

J

R_a+ 1

J

Jump to Address in AR

Jump to Address in AR

L

JMP AR

H

H

H

H

H

H

Jump to Address in

STK0; Pop Stack

RTS

Jump to Address in

STK0; Push µPC

L

H

X

L

R_a

-

R_a

-

D

-

D

-

L

Stack Ref

(Loop)

End Loop

Jump to Address in

STK0

N + 1

N

R_a+ 1

J

Pop Stack;

H

H

H

Jump to Address on D

Jump to Address on D;

Push µPC

N + 1

N

N + 1

N

D + 1

J

D + 1

J

H

X

JSR D

JMP D

D

-

Jump to Address on D

R_a

R_a

N + 1

D + 1

1 = High, 0 = Low, X = Irrelevant, Assume C_n= High

Note: STK0 is the location addressed by the stack pointer

Table 2: Output and Internal Next-Cycle Register States for 2909/2911

Table 3 (Page 5) illustrates the execution of a subroutine

using the 2909. The configuration of Figure 2 is assumed. The

instruction being executed at any given time is the one

contained in the microword register (µWR). The contents of the

µWR also control (indirectly, perhaps) the four signals S0, S1,

FE, and PUP. The starting address of the subroutine is applied

to the D inputs of the 2909 at the appropriate time.

In the column on the left is the sequence of

microinstructions to be executed. At address J+2, the

sequence control portion of the microinstruction contains the

command “Jump to subroutine at A”.

At the time T₂, this instruction is in the µWR, and the 2909

inputs are set-up to execute the jump and save the return

address. The subroutine address A is applied to the D inputs

from the µWR and appears on the Y outputs. The first

instruction of the subroutine, I(A), is accessed and is at the

inputs of the µWR. On the next clock transition, l(A) is loaded

into the µWR for execution, and the return address J + 3 is

pushed on to the stack. The return instruction is executed at

T₅. Table 4 is a similar timing chart showing one subroutine

linking to a second, the latter consisting of only one

microinstruction.

4

1 2 3 456 7 8...13

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