Datasheet > M6MGT64BS8AWG-P

M6MGT64BS8AWG-P

更新时间： 2024-02-19 20:18:21

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
3页	117K
描述
M6MGT64BS8AWG-P

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技术参数
数据手册

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M6MGT64BS8AWG-P 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84
Base Number Matches：	1

M6MGT64BS8AWG-P 数据手册

Renesas LSIs

M6MGB/T64BS8AWG-P

67,108,864-BIT (4,194,304-WORD BY 16-BIT) CMOS FLASH MEMORY

8,388,608-BIT (524,288-WORD BY 16-BIT) CMOS SRAM

Stacked-CSP (Chip Scale Package)

MCP Block Diagram

F-Vcc

F-GND

F-RY/BY#

A0 to A21

64Mbit DINOR IV

Flash Memory

F-CE#

F-WP#

F-RP#

F-WE#

F-OE#

S-Vcc

S-GND

DQ0 to DQ15

A0 to A18

S-WE#

S-OE#

S-UB#

S-LB#

S-CE1#

S-CE2

8Mbit

SRAM

Note: In the Flash memory part there are “Vcc”, “GND”, “OE#” and “WE#” which mean “F-Vcc”, “F-GND”, “F-OE#” and

“F-WE#”, respectively. In the SRAM part there are “GND”, “UB#”, “LB#”, “OE#” and “WE#” which mean “S-GND”, “S-

UB#”, “S-LB#”, “S-OE#” and “S-WE#”, respectively.

Capacitance

Limits

Typ.

Symbol

Parameter

Conditions

Unit

Min.

Max.

A21-A0, F-OE#, F-WE#, F-CE#, F-WP#, F-

RP#, S-CE1#, S-CE2, S-OE#, S-WE#, S-

LB#, S-UB#

Input

capacitance

CIN

Ta=25°C, f=1MHz,

Vin=Vout=0V

Output

Capacitance

COUT

DQ15-DQ0, F-RY/BY#

Rev.1.0.48a_bebz

123

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