M41T315Y*, M41T315V, M41T315W
SUMMARY DESCRIPTION
The M41T315Y/V/W RTC Supervisor is a combi-
nation of a CMOS TIMEKEEPER® and a nonvola-
tile memory supervisor. Power is constantly
monitored by the memory supervisor. In the event
of power instability or absence, an external battery
maintains the timekeeping operation and provides
power for a CMOS static RAM by switching on and
invoking write protection to prevent data corrup-
tion in the memory and RTC.
The M41T315Y/V/W is supplied in a 28-lead SOIC
SNAPHAT® package (which integrates both crys-
tal and battery in a single SNAPHAT top) or a-16
pin SOIC. The 28-pin, 330mil SOIC provides sock-
ets with gold plated contacts at both ends for direct
connection to a separate SNAPHAT housing con-
taining the battery and crystal. The unique design
allows the SNAPHAT battery/crystal package to
be mounted on top of the SOIC package after the
completion of the surface mount process.
The clock keeps track of tenths/hundredths of sec-
onds, seconds, minutes, hours, day, date, month,
and year information. The last day of the month is
automatically adjusted for months with less than
31 days, including leap year correction.
Insertion of the SNAPHAT housing after reflow
prevents potential battery and crystal damage due
to the high temperatures required for device sur-
face-mounting. The SNAPHAT housing is also
keyed to prevent reverse insertion.
The clock operates in one of two formats:
–
a 12-hour mode with an AM/PM indicator;
or
The 28-pin SOIC and battery/crystal packages are
shipped separately in plastic anti-static tubes or in
Tape & Reel form. For the 28-lead SOIC, the bat-
tery/crystal package (e.g., SNAPHAT) part num-
–
a 24-hour mode
The nonvolatile supervisor supplies all the neces-
sary support circuitry to convert a CMOS RAM to
a nonvolatile memory. The M41T315Y/V/W can
be interfaced with RAM without leaving gaps in
memory.
ber
is
“M4TXX-BR12SH”
(see
Table
17., page 22).
Caution: Do not place the SNAPHAT battery/crys-
tal top in conductive foam, as this will drain the lith-
ium button-cell battery.
Note: 1. For 16-pin SOIC only
Figure 3. Logic Diagram
Table 1. Signal Names
XI-XO
D
32.768 kHz Crystal Connection
Data Input
V
V
CCO
CCI
Q
Data Output
D
Q
RST
CEO
CEI
Reset Input
XI(1)
(1)
Chip Enable Output
Chip Enable Input
Battery Input
CEO
XO
M41T315Y
M41T315V
M41T315W
WE
V
BAT
CEI
OE
OE
Output Enable Input
WRITE Enable Input
Switched Supply Voltage Output
WE
RST
V
CCO
(1)
BAT
V
Supply Voltage Input
Ground
CCI
V
V
SS
AI03902
V
SS
NC
DU
Not Connected Internally
Don’t Use
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