LTM4712
PIN FUNCTIONS
INTVCC (Pin B3): Internal 5V Regulator Output of the
Switching Mode Regulator Channel. The internal control
circuits are powered from this voltage. The LTM4712
has an internal 2.2μF decoupling capacitor connecting
to SGND.
COMPa (Pin B10): Current control threshold and error
amplifier compensation point of the switching mode reg-
ulator channel. The internal current comparator threshold
is linearly proportional to this voltage. Tie the COMPa pins
from different channels together for parallel operation.
The device is internally compensated. Connect to COMPb
to use the internal compensation. Or connect to a Type-II
C-R-C network to use customized compensation.
EXTVCC (Pin B4): External Power Input to an Internal LDO
powering the gate driver. When the voltage on this pin is
greater than 8V and lower than the V pin voltage, this
IN
LDO bypasses the internal LDO powered from V . The
COMPb (Pin B11): Internal Loop Compensation Network.
Connect to COMPa to use the internal compensation in
majority of applications.
IN
LTM4712 has an internal 0.1μF decoupling capacitor.
ISET (Pin B5): Average Current Regulation Pin. A resis-
tor from this pin to SGND sets the maximum average
input or output current sensed by the ISP and ISN pins.
This pin sources 15μA current. See the Applications
Information section.
SGND (Pins C6-D6, B7-D8): Signal Ground Pin. Tie to
GND with minimum distance. Connect all small signal
components e.g., INTVCC, SS, FB, Comp, FREQ, etc. to
SGND.
SYNC (Pin B6): External Synchronization Input. The
SYNC pin has an internal pull-down resistor. See the
Operating Frequency Selection and Phase-Locked Loop
(FREQ, SYNC, PHMODE and CLKOUT Pins) section in
Applications Information for details. Tie this pin to GND
when not used.
V (Pins H1-M1, H2-M2): Power Input Pins. Apply input
IN
filter capacitors between these pins and GND pins. See
the Applications Information section.
VOUT (Pins H11-M11, H12-M12): Power Output Pins.
Apply output filter capacitors between these pins and GND
pins. See the Applications Information section.
RUN (Pin B8): Enable Control Input. A voltage above
1.22V turns on the IC. There is a 2μA pull-up current on
this pin. Once the RUN pin rises above the 1.22V thresh-
old, the pull-up increases to 6μA.
SW1, SW2 (Pins K5-L5, K8-L8): Switching Nodes of
Buck Side or Boost Side that is Used for Testing Purposes.
An R-C snubber network can be applied to reduce switch
node ringing, or otherwise leave floating.
FB (Pin B9): The Negative Input of the Error Amplifier
for the Switching Mode Regulator. This pin is internally
connected to V
with a 100k precision resistor. Output
OUT
voltages can be programmed with an additional resistor
between FB and SGND pins.
Rev. 0
7
For more information www.analog.com
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