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LTC4301LIDD8 PDF预览

LTC4301LIDD8

更新时间: 2024-01-01 03:30:03
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
12页 224K
描述
Hot Swappable 2-Wire Bus Buffer with Low Voltage Level Translation

LTC4301LIDD8 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SON
包装说明:HVSON, SOLCC8,.11,20针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.89
接口集成电路类型:INTERFACE CIRCUITJESD-30 代码:S-XDSO-N8
JESD-609代码:e0长度:3 mm
湿度敏感等级:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVSON封装等效代码:SOLCC8,.11,20
封装形状:SQUARE封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):255电源:3/5 V
认证状态:Not Qualified座面最大高度:0.8 mm
子类别:Other Interface ICs最大压摆率:6.2 mA
最大供电电压:5.5 V最小供电电压:2.7 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3 mm

LTC4301LIDD8 数据手册

 浏览型号LTC4301LIDD8的Datasheet PDF文件第2页浏览型号LTC4301LIDD8的Datasheet PDF文件第3页浏览型号LTC4301LIDD8的Datasheet PDF文件第4页浏览型号LTC4301LIDD8的Datasheet PDF文件第5页浏览型号LTC4301LIDD8的Datasheet PDF文件第6页浏览型号LTC4301LIDD8的Datasheet PDF文件第7页 
LTC4301L  
Hot Swappable 2-Wire  
Bus Buffer with Low Voltage  
Level Translation  
U
FEATURES  
DESCRIPTIO  
The LTC®4301L hot swappable, 2-wire bus buffer allows  
I/O card insertion into a live backplane without corruption  
of the data and clock busses. In addition, the LTC4301L  
SDAIN and SCLIN pins are compatible with systems with  
pull-up voltages as low as 1V. Control circuitry prevents  
the backplane from being connected to the card until a  
stop bit or a bus idle is present. When the connection is  
made, the LTC4301L provides bidirectional buffering,  
keeping the backplane and card capacitances isolated.  
Level Translates 1V Signals to Standard 3.3V and  
5V Logic Rails  
Allows Bus Pull-Up Voltages as Low as 1V on  
SDAIN and SCLIN  
Bidirectional Buffer* for SDA and SCL Lines  
Increases Fanout  
Prevents SDA and SCL Corruption During Live Board  
Insertion and Removal from Backplane  
Isolates Input SDA and SCL Line from Output  
10kV Human Body Model ESD Protection  
When driven low, the CS input pin allows the part to  
connect after a stop bit or bus idle occurs. Driving CS high  
breaks the connection between SCLIN and SCLOUT and  
between SDAIN and SDAOUT. A logic high on READY  
indicates that the backplane and card sides are connected  
together.  
Supports Clock Stretching, Arbitration and  
Synchronization  
High Impedance SDA, SCL Pins for VCC = 0V  
CS Gates Connection from Input to Output  
Compatible with I2CTM, I2C Fast Mode and SMBus  
Standards (Up to 400kHz Operation)  
Small 8-Pin MSOUP and DFN (3mm × 3mm) Packages  
The LTC4301L is offered in 8-pin DFN (3mm × 3mm) and  
MSOP packages.  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
I2C is a trademark of Philips Electronics N.V.  
*Patent Pending  
APPLICATIO S  
Hot Board Insertion  
Servers  
Capacitance Buffer/Bus Extender  
Desktop Computers  
U
TYPICAL APPLICATIO  
Input-Output Connection  
1.2V  
3.3V  
0.01µF  
2k  
2k  
10k 10k  
SDA  
V
V
CC  
CC  
SDA  
SCL  
SDAIN  
SDAOUT  
INPUT  
SIDE  
55pF  
OUTPUT  
SIDE  
µP  
LTC4301L  
20pF  
SCL  
SCLIN  
SCLOUT  
0.5V/DIV  
CS  
READY  
GND  
GND  
4301l TA01a  
4301 TA01b  
1µs/DIV  
4301lf  
1

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