LTC1408
6 Channel, 14-Bit, 600ksps
Simultaneous Sampling ADC
U
with Shutdown
FEATURES
DESCRIPTIO
The LTC®1408 is a 14-bit, 600ksps ADC with six simulta-
neously sampled differential inputs. The device draws
only 5mA from a single 3V supply, and comes in a tiny 32
pin (5mm × 5mm) QFN package. A SLEEP shutdown
feature lowers power consumption to 6µW. The combina-
tion of low power and tiny package makes the LTC1408
suitable for portable applications.
■
600ksps ADC with 6 Simultaneously Sampled
Differential Inputs
■
100ksps Throughput per Channel
■
76dB SINAD
■
Low Power Dissipation: 15mW
■
3V Single Supply Operation
■
2.5V Internal Bandgap Reference, Can be Overdriven
with External Reference
3-Wire Serial Interface
The LTC1408 contains six separate differential inputs that
are sampled simultaneously on the rising edge of the
CONV signal. These six sampled inputs are then
converted at a rate of 100ksps per channel.
■
■
Internal Conversion Triggered by CONV
■
SLEEP (6µW) Shutdown Mode
■
NAP (3.3mW) Shutdown Mode
The 90dB common mode rejection allows users to
eliminate ground loops and common mode noise by
measuring signals differentially from the source.
■
0V to 2.5V Unipolar, or ±1.25V Bipolar Differential
Input Range
■
90dB Common Mode Rejection
■
Tiny 32-Pin (5mm × 5mm) QFN Package
The device converts 0V to 2.5V unipolar inputs differen-
tially, or ±1.25V bipolar inputs also differentially,
depending on the state of the BIP pin. Any analog input
may swing rail-to-rail as long as the differential input
range is maintained.
U
APPLICATIO S
■
Multiphase Power Measurement
■
■
■
Multiphase Motor Control
The conversion sequence can be abbreviated to convert
fewer than six channels, depending on the logic state of
the SEL2, SEL1 and SEL0 inputs.
Data Acquisition Systems
Uninterruptable Power Supplies
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All
other trademarks are the property of their respective owners. Protected by U.S. Patents
including 6084440, 6522187.
The serial interface sends out the six conversion results in
96 clocks for compatibility with standard serial interfaces.
W
BLOCK DIAGRA
–
+
–
+
–
+
–
+
–
+
–
+
10µF
3V
25
CH5
CH5
CH4
CH4
CH3
CH3
CH2
CH2
CH1
CH1
CH0
CH0
V
CC
V
DD
21
20 19 18
17 16 15
14 12 11
13
10
9
8
7
6
5
4
24
14-BIT LATCH 0
14-BIT LATCH 1
14-BIT LATCH 2
14-BIT LATCH 3
14-BIT LATCH 4
14-BIT LATCH 5
OV
3V
DD
–
–
–
–
–
3
1
2
–
THREE-
STATE
SERIAL
OUTPUT
PORT
S AND H
S AND H
S AND H
S AND H
S AND H
S AND H
SD0
600ksps
14-BIT ADC
0.1µF
OGND
MUX
TIMING
LOGIC
CONV
SCK
30
32
31
2.5V
REFERENCE
DGND
V
GND
22
REF
23
33
29
26
27
28
10µF
1408 TA01
BIP
SEL2 SEL1 SEL0
1408fa
1