LTC1403/LTC1403A
Serial 12-Bit/14-Bit, 2.8Msps
Sampling ADCs with Shutdown
U
FEATURES
DESCRIPTIO
The LTC®1403/LTC1403A are 12-bit/14-bit, 2.8Msps se-
rial ADCs with differential inputs. The devices draw only
4.7mA from a single 3V supply and come in a tiny 10-lead
MS package. A Sleep shutdown feature lowers power
consumption to 10µW. The combination of speed, low
power and tiny package makes the LTC1403/LTC1403A
suitable for high speed, portable applications.
■
2.8Msps Conversion Rate
■
Low Power Dissipation: 14mW
■
3V Single Supply Operation
■
2.5V Internal Bandgap Reference can be Overdriven
■
3-Wire Serial Interface
■
Sleep (10µW) Shutdown Mode
■
Nap (3mW) Shutdown Mode
■
80dB Common Mode Rejection
The 80dB common mode rejection allows users to elimi-
nategroundloopsandcommonmodenoisebymeasuring
signals differentially from the source.
■
0V to 2.5V Unipolar Input Range
■
Tiny 10-Lead MS Package
U
The devices convert 0V to 2.5V unipolar inputs differen-
tially. The absolute voltage swing for +AIN and –AIN
extends from ground to the supply voltage.
APPLICATIO S
■
Communications
Data Acquisition Systems
■
The serial interface sends out the conversion results
during the 16 clock cycles following CONV↑ for compat-
ibility with standard serial interfaces. If two additional
clock cycles for acquisition time are allowed after the data
stream in between conversions, the full sampling rate of
2.8Msps can be achieved with a 50.4MHz clock.
■
Uninterrupted Power Supplies
■
Multiphase Motor Control
■
Multiplexed Data Acquisition
, LTC and LT are registered trademarks of Linear Technology Corporation.
W
BLOCK DIAGRA
2nd, 3rd and SFDR
10µF 3V
vs Input Frequency
–44
7
V
–50
–56
LTC1403A
DD
+
–
THREE-
STATE
SERIAL
OUTPUT
PORT
A
A
THD
2nd, SFDR
IN
1
2
+
–62
14-BIT ADC
SDO
S & H
8
–68
–74
IN
–
3rd
–80
–86
14
V
REF
3
4
10
9
CONV
SCK
–92
2.5V
REFERENCE
TIMING
LOGIC
10µF
–98
GND
5
–104
0.1
1
10
100
1403A TA01
6
11
EXPOSED PAD
FREQUENCY (MHz)
1403A TA02
1403af
1