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LTC1403

更新时间： 2023-12-20 18:44:37
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
22页 361K
描述
具停机功能的串行 12 位、2.8Msps 采样 ADC

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中文翻译

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LTC1403 数据手册

 浏览型号LTC1403的Datasheet PDF文件第2页浏览型号LTC1403的Datasheet PDF文件第3页浏览型号LTC1403的Datasheet PDF文件第4页浏览型号LTC1403的Datasheet PDF文件第5页浏览型号LTC1403的Datasheet PDF文件第6页浏览型号LTC1403的Datasheet PDF文件第7页 
LTC1403/LTC1403A  
Serial 12-Bit/14-Bit, 2.8Msps  
Sampling ADCs with Shutdown  
Features  
Description  
The LTC®1403/LTC1403A are 12-bit/14-bit, 2.8Msps se-  
rial ADCs with differential inputs. The devices draw only  
4.7mA from a single 3V supply and come in a tiny 10-lead  
MS package. A Sleep shutdown feature lowers power  
n
2.8Msps Conversion Rate  
n
Low Power Dissipation: 14mW  
n
3V Single Supply Operation  
–40°C to 125°C Guaranteed Operation  
2.5V Internal Bandgap Reference can be Overdriven  
3-Wire Serial Interface  
Sleep (10µW) Shutdown Mode  
Nap (3mW) Shutdown Mode  
80dB Common Mode Rejection  
0V to 2.5V Unipolar Input Range  
Tiny 10-Lead MS Package  
n
n
consumption to 10µW. The combination of speed, low  
power and tiny package makes the LTC1403/LTC1403A  
suitable for high speed, portable applications.  
n
n
n
n
n
n
The80dBcommonmoderejectionallowsuserstoeliminate  
ground loops and common mode noise by measuring  
signals differentially from the source.  
Thedevicesconvert0Vto2.5Vunipolarinputsdifferentially.  
Theabsolutevoltageswingfor+A and–A extendsfrom  
IN  
IN  
applications  
ground to the supply voltage.  
n
Automotive  
Theserialinterfacesendsouttheconversionresultsduring  
the16clockcyclesfollowingCONV↑forcompatibilitywith  
standard serial interfaces. If two additional clock cycles  
for acquisition time are allowed after the data stream in  
between conversions, the full sampling rate of 2.8Msps  
can be achieved with a 50.4MHz clock.  
n
Communications  
n
Data Acquisition Systems  
n
Uninterrupted Power Supplies  
n
Multiphase Motor Control  
n
Multiplexed Data Acquisition  
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and  
LinearView and SoftSpan are trademarks of Linear Technology Corporation. All other trademarks  
are the property of their respective owners.  
Block Diagram  
2nd, 3rd and SFDR vs  
10µF 3V  
Input Frequency  
–44  
7
V
LTC1403A  
DD  
–50  
–56  
+
–
THREE-  
STATE  
SERIAL  
OUTPUT  
PORT  
A
A
THD  
2nd, SFDR  
IN  
IN  
1
2
+
–62  
14-BIT ADC  
SDO  
S & H  
8
–68  
–74  
–
3rd  
14  
–80  
–86  
V
REF  
3
4
10  
9
CONV  
SCK  
–92  
2.5V  
REFERENCE  
TIMING  
LOGIC  
10F  
–98  
GND  
5
–104  
1403A TA01  
0.1  
1
10  
100  
6
11  
EXPOSED PAD  
FREQUENCY (MHz)  
1403A TA02  
1403fc  
1
For more information www.linear.com/LTC1403  
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