LTC1069-7
PIN FUNCTIONS
a dual or single supply operation. A pulse generator can
be used as a clock source provided the high level on-time
ANALOG GROUND
ꢀLANE
1
8
7
6
5
AGND
V
OUT
V
is greater than 0.42μs (V = 5V). Sine waves less than
OUT
S
2
3
4
+
–
–
+
V
V
V
100kHz are not recommended for clock sources because
excessive slow clock rise or fall times generate internal
clock jitter. The maximum clock rise or fall time is 1μs. The
clock signal should be routed from the right side of the IC
package to avoid coupling into any input or output analog
signal path.A1kresistorbetweentheclocksourceandthe
clock input (ꢀin 5) will slow down the rise and fall times
of the clock to further reduce charge coupling, Figure 1.
V
0.1μF
LTC1069-7
0.1μF
NC
NC
V
CLK
V
IN
IN
DIGITAL
STAR
SYSTEM
GROUND
GROUND
ꢀLANE
1k
CLOCK
SOURCE
Table 1. Clock Source High and Low Thresholds
1069 F02
POWER SUPPLY
HIGH LEVEL
1.5V
LOW LEVEL
0.5V
Figure 2. Connections for Dual Supply Operation
Dual Supply = 5V
Single Supply = 10V
Single Supply = 5V
6.5V
5.5V
CLK (Pin 5): Clock Input. Any TTL or CMOS clock source
with a square wave output and 50% duty cycle ( 10%) is
anadequateclocksourceforthedevice. Thepowersupply
for the clock source should not necessarily be the filter’s
power supply. The analog ground of the filter should only
be connected to the clock’s ground at a single point. Table
1 shows the clock’s low and high level threshold value for
1.5V
0.5V
V
OUT
(Pin 8): Filter Output. ꢀin 8 is the output of the filter,
and it can source 23mA or sink 16mA. The total harmonic
distortion of the filter will degrade when driving coaxial
cables or loads less than 20k without an output buffer.
APPLICATIONS INFORMATION
Temperature Behavior
Table 2. Clock Feedthrough
V
CLOCK FEEDTHROUGH
S
The power supply current of the LTC1069-7 has a positive
temperature coefficient. The GBW product of its internal
op amps is nearly constant and the speed of the device
does not degrade at high temperatures.
5V
5V
400μV
850μV
RMS
RMS
Any parasitic switching transients during the rising and
falling edges of the incoming clock are not part of the
clock feedthrough specifications. Switching transients
have frequency contents much higher than the applied
clock; their amplitude strongly depends on scope probing
techniques as well as grounding and power supply
bypassing. The clock feedthrough can be reduced by
adding a single RC lowpass filter at the output (ꢀin 8) of
the LTC1069-7.
Clock Feedthrough
The clock feedthrough is defined as the RMS value of the
clock frequency and its harmonics that are present at the
filter’s output (ꢀin 8). The clock feedthrough is tested with
the input (ꢀin 4) shorted to the AGND pin and depends on
ꢀC board layout and on the value of the power supplies.
With proper layout techniques the values of the clock
feedthrough are shown on Table 2.
10697fa
7
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