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LTC1064MJ PDF预览

LTC1064MJ

更新时间： 2024-02-27 05:51:18
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
16页 389K
描述
Low Noise, Fast, Quad Universal Filter Building Block

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LTC1064MJ 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：PLASTIC, SOL-24
针数：24Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.66有源滤波器类型：SWITCHED CAPACITOR FILTER
中心频率或截止频率最大范围：100 kHz中心频率或截止频率最小范围：0.0001 kHz
JESD-30 代码：R-PDSO-G24JESD-609代码：e0
长度：15.4 mm标称负供电电压 (Vsup)：-8 V
功能数量：4端子数量：24
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
极和零点：2 AND 0认证状态：Not Qualified
响应：UNIVERSAL座面最大高度：2.65 mm
标称供电电压 (Vsup)：8 V表面贴装：YES
技术：CMOS端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：7.5 mm
Base Number Matches：1

LTC1064MJ 数据手册

 浏览型号LTC1064MJ的Datasheet PDF文件第3页浏览型号LTC1064MJ的Datasheet PDF文件第4页浏览型号LTC1064MJ的Datasheet PDF文件第5页浏览型号LTC1064MJ的Datasheet PDF文件第7页浏览型号LTC1064MJ的Datasheet PDF文件第8页浏览型号LTC1064MJ的Datasheet PDF文件第9页 
LTC1064  
U
U
U
PIN FUNCTIONS  
V+, V– (Pins 7, 19): Power Supplies. They should be  
bypassed with a 0.1µF ceramic capacitor. Low noise,  
nonswitching power supplies are recommended. The de-  
vice operates with a single 5V supply and with dual  
supplies. The absolute maximum operating power supply  
voltage is ±8V.  
AGND (Pin 6): Analog Ground. When the LTC1064 oper-  
ates with dual supplies, Pin 6 should be tied to system  
ground.WhentheLTC1064operateswithasinglepositive  
supply, the analog ground pin should be tied to 1/2 supply  
and it should be bypassed with a 1µF solid tantalum in  
parallel with a 0.1µF ceramic capacitor, Figure 1. The  
positive input of all the internal op amps, as well as the  
common reference of all the internal switches, are inter-  
nally tied to the analog ground pin. Because of this, a very  
“clean” ground is recommended.  
50/100 (Pin 17): By tying Pin 17 to V+, all filter sections  
operate with a clock-to-center frequency ratio internally  
setat50:1. WhenPin17isatmid-supplies, sectionsBand  
C operate with (fCLK/fO) = 50:1 and sections A and D  
operate at 100:1. When Pin 17 is shorted to the negative  
supply pin, all filter sections operate with (fCLK/fO) =  
100:1.  
CLK (Pin 18): Clock. For ±5V supplies the logic threshold  
level is 1.4V. For ±8V and 0V to 5V supplies the logic  
threshold levels are 2.2V and 3V respectively. The logic  
threshold levels vary ±100mV over the full military tem-  
perature range. The recommended duty cycle of the input  
clockis50%,althoughforclockfrequenciesbelow500kHz,  
the clock “on” time can be as low as 200ns. The maximum  
clock frequency for ±5V supplies is 4MHz. For ±7V  
supplies and above, the maximum clock frequency is  
7MHz.  
1
24  
2
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
+
V
LTC1064  
3
4
5
5k  
5k  
V+/2  
6
–
AGND  
V
CLOCK INPUT  
+
7
+
V
V
V
= 15V, TRIP VOLTAGE = 7V  
= 10V, TRIP VOLTAGE = 6.4V  
= 5V, TRIP VOLTAGE = 3V  
+
V
CLK  
50/100  
+
+
1µF  
8
0.1µF  
9
10  
11  
12  
TO DIGITAL  
GROUND  
ANALOG  
GROUND  
PLANE  
1064 F01  
NOTE: PINS 5, 8, 20, IF NOT USED, SHOULD BE CONNECTED TO PIN 6  
Figure 1. Single Supply Operation  
6
1...3456789...16

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