LT1614
U
OPERATIO
When Q1 turns off during the second phase of switching,
theSWXnodevoltageabruptlyincreasesto(VIN +|VOUT|).
TheSWnodevoltageincreasestoVD (about350mV).Now
current in the first loop, begining at C1, flows through L1,
C2, D1 and back to C1. Current in the second loop flows
from C3 through L2, D1 and back to C3. Load current
continues to be supplied by L2 and C3.
rents are dumped into the ground plane as drawn in
Figures 4, 5 and 6. This single layout technique can
virtually eliminate high frequency “spike” noise so often
present on switching regulator outputs.
Output ripple voltage appears as a triangular waveform
ridingonVOUT. Ripplemagnitudeequalstheripplecurrent
of L2 multiplied by the equivalent series resistance (ESR)
of output capacitor C3. Increasing the inductance of L1
and L2 lowers the ripple current, which leads to lower
output voltage ripple. Decreasing the ESR of C3, by using
ceramic or other low ESR type capacitors, lowers output
ripple voltage. Output ripple voltage can be reduced to
arbitrarily low levels by using large value inductors and
low ESR, high value capacitors.
An important layout issue arises due to the chopped
natureofthecurrentsflowinginQ1andD1.Iftheyareboth
tied directly to the ground plane before being combined,
switching noise will be introduced into the ground plane.
Itisalmostimpossibletogetridofthisnoise,oncepresent
in the ground plane. The solution is to tie D1’s cathode to
the ground pin of the LT1614 before the combined cur-
V
–(V
+
V
OUT
)
CESAT
IN
C2
L1
L2
SW
SWX
V
IN
–V
OUT
D1
Q1
+
C1
C3
R
LOAD
+
1614 F05
Figure 5. Switch-On Phase of Inverting Converter. L1 and L2 Current Have Positive dI/dt
V
+
V
+ V
V
D
IN
OUT
D
C2
L1
L2
SW
SWX
V
–V
OUT
IN
D1
Q1
+
C1
C3
R
LOAD
+
1614 F06
Figure 6. Switch-Off Phase of Inverting Converter. L1 and L2 Current Have Negative dI/dt
7