LPC43S5x/S3x
32-bit ARM Cortex-M4/M0 MCU; up to 1 MB flash and 136 kB
SRAM; Ethernet, 2 x USB, LCD, EMC, AES engine
Rev. 1.3 — 13 January 2020
Product data sheet
1. General description
The LPC43S5x/S3x are ARM Cortex-M4 based microcontrollers for embedded
applications which include an ARM Cortex-M0 coprocessor, up to 1 MB of flash and
136 kB of on-chip SRAM, 16 kB of EEPROM memory, security features with AES engine,
a quad SPI Flash Interface (SPIFI), advanced configurable peripherals such as the State
Configurable Timer (SCT) and the Serial General Purpose I/O (SGPIO) interface, two
High-speed USB controllers, Ethernet, LCD, an external memory controller, and multiple
digital and analog peripherals. The LPC43S5x/S3x operate at CPU frequencies of up to
204 MHz.
The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power
consumption, enhanced debug features, and a high level of support block integration. The
ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with
separate local instruction and data buses as well as a third bus for peripherals, and
includes an internal prefetch unit that supports speculative branching. The ARM
Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A
hardware floating-point unit is integrated in the core. The ARM Cortex-M4 with
floating-point unit is often referred to as M4F.
The ARM Cortex-M0 coprocessor is an energy-efficient and easy-to-use 32-bit core which
is upward code- and tool-compatible with the Cortex-M4 core. The Cortex-M0
coprocessor, designed as a replacement for existing 8/16-bit microcontrollers, offers up to
204 MHz performance with a simple instruction set and reduced code size.
For additional documentation related to the LPC43xx parts, see Section 17.
2. Features and benefits
Cortex-M4 Processor core
ARM Cortex-M4 processor (version r0p1), running at frequencies of up to
204 MHz.
Built-in Memory Protection Unit (MPU) supporting eight regions.
Built-in Nested Vectored Interrupt Controller (NVIC).
Hardware floating-point unit.
Non-maskable Interrupt (NMI) input.
JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four
watch points.
Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.
System tick timer.
Cortex-M0 Processor core