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LPC3240FET296/01,5

更新时间： 2024-02-06 19:06:43
品牌 Logo 应用领域
恩智浦 - NXP 时钟PC微控制器静态存储器外围集成电路
页数 文件大小 规格书
79页 442K
描述
LPC3240FET296 - ARM926EJ-S with 256 kB SRAM, USB High-speed OTG, SD/MMC, NAND flash controller, Ethernet BGA 296-Pin

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LPC3240FET296/01,5 技术参数

是否Rohs认证： 符合生命周期：Not Recommended
零件包装代码：BGA包装说明：TFBGA, BGA296,18X18,32
针数：296Reach Compliance Code：compliant
风险等级：7.93具有ADC：YES
地址总线宽度：位大小：32
CPU系列：ARM9最大时钟频率：20 MHz
DAC 通道：NODMA 通道：YES
外部数据总线宽度：JESD-30 代码：S-PBGA-B296
长度：15 mm湿度敏感等级：3
I/O 线路数量：87端子数量：296
最高工作温度：85 °C最低工作温度：-40 °C
PWM 通道：YES封装主体材料：PLASTIC/EPOXY
封装代码：TFBGA封装等效代码：BGA296,18X18,32
封装形状：SQUARE封装形式：GRID ARRAY, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260电源：1.2,3.3 V
认证状态：Not QualifiedRAM（字节）：262144
ROM（单词）：0ROM可编程性：FLASH
座面最大高度：1.2 mm速度：266 MHz
子类别：Microcontrollers最大供电电压：1.39 V
最小供电电压：1.31 V标称供电电压：1.35 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.8 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：15 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLER, RISCBase Number Matches：1

LPC3240FET296/01,5 数据手册

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LPC3220/30/40/50  
16/32-bit ARM microcontrollers; hardware floating-point  
coprocessor, USB On-The-Go, and EMC memory interface  
Rev. 2 — 20 October 2011  
Product data sheet  
1. General description  
The LPC3220/30/40/50 embedded microcontrollers were designed for low power, high  
performance applications. NXP achieved their performance goals using a 90 nanometer  
process to implement an ARM926EJ-S CPU core with a vector floating point co-processor  
and a large set of standard peripherals including USB On-The-Go. The  
LPC3220/30/40/50 operates at CPU frequencies of up to 266 MHz.  
The NXP implementation uses a ARM926EJ-S CPU core with a Harvard architecture,  
5-stage pipeline, and an integral Memory Management Unit (MMU). The MMU provides  
the virtual memory capabilities needed to support the multi-programming demands of  
modern operating systems. The ARM926EJ-S also has a hardware based set of DSP  
instruction extensions, which includes single cycle MAC operations, and hardware based  
native Jazelle Java Byte-code execution. The NXP implementation has a 32 kB  
instruction cache and a 32 kB data cache.  
For low power consumption, the LPC3220/30/40/50 takes advantage of NXP’s advanced  
technology development to optimize intrinsic power and uses software controlled  
architectural enhancements to optimize application based power management.  
The LPC3220/30/40/50 also includes 256 kB of on-chip static RAM, a NAND flash  
interface, an Ethernet MAC, an LCD controller that supports STN and TFT panels, and an  
external bus interface that supports SDR and DDR SDRAM as well as static devices. In  
addition, the LPC3220/30/40/50 includes a USB 2.0 full-speed interface, seven UARTs,  
two I2C-bus interfaces, two SPI/SSP ports, two I2S-bus interfaces, two single output  
PWMs, a motor control PWM, six general purpose timers with capture inputs and compare  
outputs, a Secure Digital (SD) interface, and a 10-bit Analog-to-Digital Converter (ADC)  
with a touch screen sense option.  
2. Features and benefits  
ARM926EJ-S processor, running at CPU clock speeds up to 266 MHz.  
Vector Floating Point (VFP) coprocessor.  
32 kB instruction cache and 32 kB data cache.  
Up to 256 kB of Internal SRAM (IRAM).  
Selectable boot-up from various external devices: NAND flash, SPI memory, USB,  
UART, or static memory.  
Multi-layer AHB system that provides a separate bus for each AHB master, including  
both an instruction and data bus for the CPU, two data busses for the DMA controller,  
and another bus for the USB controller, one for the LCD, and a final one for the  
Ethernet MAC. There are no arbitration delays in the system unless two masters  
attempt to access the same slave at the same time.  
 
 
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LPC3250FET296/01,5 NXP LPC3250FET296 - ARM926EJ-S with 256 kB SRAM, USB High-speed OTG, SD/MMC, NAND flash contro

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LPC3250FET296-S NXP IC,MICROCONTROLLER,32-BIT,BGA,296PIN,PLASTIC

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