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LNK4323D-TL

更新时间: 2022-09-29 19:29:14
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT /
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22页 1423K
描述
IC OFF-LINE CNTRLR 10W 8SO

LNK4323D-TL 数据手册

 浏览型号LNK4323D-TL的Datasheet PDF文件第1页浏览型号LNK4323D-TL的Datasheet PDF文件第2页浏览型号LNK4323D-TL的Datasheet PDF文件第3页浏览型号LNK4323D-TL的Datasheet PDF文件第5页浏览型号LNK4323D-TL的Datasheet PDF文件第6页浏览型号LNK4323D-TL的Datasheet PDF文件第7页 
LinkSwitch-4  
into Sleep mode, reducing its current consumption to IVCC(SLEEP). The  
control circuitry will re-initialize if the input voltage is restored and  
Functional Description  
Power-Up/Power-Down Sequences  
VVCC reaches VVCC(RUN)  
.
Refer to Figure 10 and Figure 7. When mains input voltage (VIN) is  
applied, current flows through the start-up resistors (RHT) and BJT.  
Some of this current flows into the LinkSwitch-4 internal circuits,  
ꢀꢁꢁꢂRꢃꢄꢅ  
which are in Sleep mode; the remainder charges capacitor CVCC  
.
As soon as the VOLTAGE SUPPLY pin voltage rises to VVCC(RUN), the  
LinkSwitch-4 changes to Initialise mode. Current consumption  
increases to IVCC(RUN) while internal circuits are enabled. The emitter  
switch is held at low impedance to ground (GND) and a short drive  
pulse is output on the BASE DRIVE pin, during which time the voltage  
at feedback is held at GND potential by current sourced from the  
FEEDBACK pin. This enables the LinkSwitch-4 control circuit to  
compare the rectified mains input voltage with thresholds for allowing  
or preventing the next stage of power-up. If the input voltage is too  
low (IFB <IFBHT(START)), the LinkSwitch-4 will not issue further drive  
pulses, the VCC voltage will discharge to VVCC(SLEEP), and the power-up  
sequence will repeat. If the mains input voltage is high enough (IFB >  
IFBHT(START)), the LinkSwitch-4 will enter Run mode and drive pulses will  
be output on the BASE DRIVE pin. To achieve smooth power-up  
(monotonic rise in VOUT), CVCC must be large enough to power the  
control circuitry during Initialize mode and the first few cycles of Run  
mode, until sufficient power is provided by the transformer voltage  
supply winding.  
ꢀꢁꢁ  
ꢀꢁꢁꢂꢆꢇꢈꢈꢉꢅ  
ꢊꢋꢋ  
ꢆꢌeeꢍ  
ꢎꢏꢐꢑꢐꢒꢌꢐꢓe  
Rꢔꢏ  
ꢆꢌeeꢍ ꢊꢋꢋ  
ꢉꢎꢕꢖꢗ5ꢖꢕ010815  
Figure 7. VCC Waveforms.  
If the input voltage falls below VMAINS(LO) (see Input Undervoltage  
Protection), VVCC will fall below VVCC(SLEEP) and the LinkSwitch-4 will go  
Mode  
Description  
From initial application of input power or from Run mode, if VVCC falls below VVCC(SLEEP), the LinkSwitch-4 goes to Sleep mode.  
Non-essential circuits are turned off. Base and Emitter drives are turned off so BASE DRIVE and EMITTER DRIVE pins  
become high impedance, allowing the bootstrap resistor (RHT) and BJT to start the circuit. Sleep mode is exited when VVCC  
rises to VVCC(RUN) and the control circuitry goes to Initialize mode.  
Sleep  
Internal circuits are enabled and the LinkSwitch-4 issues one switching cycle to sample the input voltage via the FEEDBACK  
pin. If VIN (hence VHT) is high enough, the LinkSwitch-4 changes to Run mode. If VIN is not high enough, no further base drive  
Initialize  
pulses are issued and the LinkSwitch-4 returns to Sleep mode when VVCC falls below VVCC(SLEEP)  
.
Power conversion: The control circuitry is powered from the VCC rail and the internal VDD is regulated. If VVCC falls below  
VVCC(SLEEP), the IC ceases power conversion and goes to Sleep mode.  
Run  
Table 2.  
Summary of LinkSwitch-4 Operating Modes.  
4
Rev. F 05/18  
www.power.com  

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