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LNK403LG PDF预览

LNK403LG

更新时间: 2024-02-08 12:26:11
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT 驱动器
页数 文件大小 规格书
20页 2117K
描述
LinkSwitch-PH LED Driver IC Family

LNK403LG 技术参数

是否Rohs认证: 符合生命周期:Not Recommended
包装说明:,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.67接口集成电路类型:LED DISPLAY DRIVER
JESD-609代码:e3峰值回流温度(摄氏度):NOT SPECIFIED
端子面层:MATTE TIN处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

LNK403LG 数据手册

 浏览型号LNK403LG的Datasheet PDF文件第1页浏览型号LNK403LG的Datasheet PDF文件第3页浏览型号LNK403LG的Datasheet PDF文件第4页浏览型号LNK403LG的Datasheet PDF文件第5页浏览型号LNK403LG的Datasheet PDF文件第6页浏览型号LNK403LG的Datasheet PDF文件第7页 
LNK403-409/413-419  
DRAIN (D)  
5.9 V  
BYPASS (BP)  
REGULATOR  
BYPASS  
CAPACITOR  
SELECT  
SOFT-START  
TIMER  
HYSTERETIC  
THERMAL  
SHUTDOWN  
+
-
FAULT  
PRESENT  
ILIM  
MI  
5.9 V  
5.0 V  
AUTO-RESTART  
COUNTER  
BYPASS PIN  
UNDERVOLTAGE  
Gate  
Driver  
1 V  
VOLTAGE  
MONITOR (V)  
SenseFet  
LEB  
STOP  
LOGIC  
JITTER  
CLOCK  
Comparator  
OSCILLATOR  
-
+
FBOFF  
DCMAX  
3-VT  
OCP  
UV/OV  
LINE  
+
-
SENSE  
CURRENT LIMIT  
COMPARATOR  
ILIM  
IV  
FEEDBACK (FB)  
PFC/CC  
CONTROL  
VSENSE  
VBG  
MI  
IFB  
FBOFF  
DCMAX  
FEEDBACK  
SENSE  
IS  
REFERENCE  
BLOCK  
REFERENCE (R)  
VBG  
6.4 V  
PI-5431-102610  
SOURCE (S)  
Figure 3. Functional Block Diagram.  
VOLTAGE MONITOR (V) Pin:  
Pin Functional Description  
This pin interfaces with an external input line peak detector,  
consisting of a rectifier, filter capacitor and resistors. The  
applied current is used to control stop logic for line under-  
voltage (UV), overvoltage (OV), provide feed-forward to control  
the output current and the remote ON/OFF function.  
DRAIN (D) Pin:  
This pin is the power FET drain connection. It also provides  
internal operating current for both start-up and steady-state  
operation.  
SOURCE (S) Pin:  
Exposed Pad  
(Backside) Internally  
Connected to  
This pin is the power FET source connection. It is also the  
ground reference for the BYPASS, FEEDBACK, REFERENCE and  
VOLTAGE MONITOR pins.  
SOURCE Pin  
E Package (eSIP-7C)  
L Package (eSIP-7F)  
(Top View)  
BYPASS (BP) Pin:  
This is the connection point for an external bypass capacitor for  
the internally generated 5.9 V supply. This pin also provides  
output power selection through choice of the BYPASS pin  
capacitor value.  
7 D  
5 S  
4 BP  
3 FB  
2 V  
1 R  
3
FB  
5
S
1
R
FEEDBACK (FB) Pin:  
Exposed Pad  
(backside) Internally  
Connected to  
SOURCE Pin (see  
eSIP-7C Package  
Drawing)  
The FEEDBACK pin is used for output voltage feedback. The  
current into the FEEDBACK pin is directly proportional to the  
output voltage. The FEEDBACK pin also includes circuitry to  
protect against open load and overload output conditions.  
2
4
7
D
Lead Bend Outward  
from Drawing  
V BP  
(Refer to eSIP-7F Package  
Outline Drawing)  
PI-5432-082411  
Figure 4. Pin Configuration.  
REFERENCE (R) Pin:  
This pin is connected to an external precision resistor and is  
used to configure for dimming (LNK403-409) and non-TRIAC  
dimming (LNK413-419) modes of operation.  
2
Rev. D 08/11  
www.powerint.com  

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