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LNK3205G-TL PDF预览

LNK3205G-TL

更新时间: 2024-02-09 06:35:59
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT 开关光电二极管
页数 文件大小 规格书
22页 1875K
描述
IC OFFLN CONV MULT TOP 8SMD

LNK3205G-TL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:SOP,
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:14 weeks
风险等级:1.74模拟集成电路 - 其他类型:SWITCHING REGULATOR
JESD-30 代码:R-PDSO-G7长度:9.44 mm
功能数量:1端子数量:7
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED座面最大高度:3.98 mm
表面贴装:YES切换器配置:BUCK-BOOST
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.35 mm
Base Number Matches:1

LNK3205G-TL 数据手册

 浏览型号LNK3205G-TL的Datasheet PDF文件第1页浏览型号LNK3205G-TL的Datasheet PDF文件第2页浏览型号LNK3205G-TL的Datasheet PDF文件第4页浏览型号LNK3205G-TL的Datasheet PDF文件第5页浏览型号LNK3205G-TL的Datasheet PDF文件第6页浏览型号LNK3205G-TL的Datasheet PDF文件第7页 
LNK3202/3204-6  
600  
500  
LinkSwitch-TN2 Functional Description  
LinkSwitch-TN2 combines a high-voltage power MOSFET switch with  
a power supply controller in one device. Unlike conventional PWM  
(pulse width modulator) controllers, LinkSwitch-TN2 uses a simple  
ON/OFF control to regulate the output voltage. The LinkSwitch-TN2  
controller consists of an oscillator, feedback (sense and logic) circuit,  
5.0 V regulator, BYPASS pin undervoltage circuit, over-temperature  
protection, line and output overvoltage protection, frequency jittering,  
current limit circuit, leading edge blanking and a 725 V power  
MOSFET. The LinkSwitch-TN2 incorporates additional circuitry for  
auto-restart.  
VDRAIN  
400  
300  
200  
100  
Oscillator  
0
The typical oscillator frequency is internally set to an average of fOSC  
(66 kHz). Two signals are generated from the oscillator: the maximum  
duty cycle signal (DC(MAX)) and the clock signal that indicates the  
beginning of each cycle.  
68 kHz  
64 kHz  
0
20  
The LinkSwitch-TN2 oscillator incorporates circuitry that introduces a  
small amount of frequency jitter, typically 4 kHz peak-to-peak, to  
minimize EMI emission. The modulation rate of the frequency jitter is  
set to 1 kHz to optimize EMI reduction for both average and quasi-  
peak emissions. The frequency jitter should be measured with the  
oscilloscope triggered at the falling edge of the DRAIN waveform.  
The waveform in Figure 5 illustrates the frequency jitter of the  
LinkSwitch-TN2.  
Time (µs)  
Figure 5. Frequency Jitter.  
BYPASS Pin Undervoltage  
The BYPASS pin undervoltage circuitry disables the power MOSFET  
when the BYPASS pin voltage drops below VBP–VBPH (approximately 4.5 V).  
Once the BYPASS pin voltage drops below this threshold, it must rise  
back to VBP to enable (turn-on) the power MOSFET.  
Feedback Input Circuit  
Over-Temperature Protection  
The feedback input circuit at the FEEDBACK pin consists of a low  
impedance source follower output set at VFB (2.0 V). When the  
current delivered into this pin exceeds IFB (49 μA), a low logic level  
(disable) is generated at the output of the feedback circuit. This  
output is sampled at the beginning of each cycle on the rising edge  
of the clock signal. If high, the power MOSFET is turned on for that  
cycle (enabled), otherwise the power MOSFET remains off (disabled).  
The sampling is done only at the beginning of each cycle. Subse-  
quent changes in the FEEDBACK pin voltage or current during the  
remainder of the cycle do not impact the MOSFET enable/disable  
status. If a current greater than IFBSD is injected into the feedback pin  
while the MOSFET is enabled for at least two consecutive cycles the  
part will stop switching and enter auto-restart off-time. Normal  
switching resumes after the auto-restart off-time expires. This  
shutdown function allows implementing line overvoltage protection in  
flyback converters (see Figure 6). The current into the FEEDBACK pin  
should be limited to less than 1.2 mA.  
The thermal shutdown circuitry senses the die temperature. The  
threshold is set at TSD (142 °C typical) with a 75 °C (TSDH) hysteresis.  
When the die temperature rises above TSD the power MOSFET is  
disabled and remains disabled until the die temperature falls to  
TSD–TSDH, at which point it is re-enabled.  
Current Limit  
The current limit circuit senses the current in the power MOSFET.  
When this current exceeds the internal threshold (ILIMIT), the power  
MOSFET is turned off for the remainder of that cycle. The leading  
edge blanking circuit inhibits the current limit comparator for a short  
time (tLEB) after the power MOSFET is turned on. This leading edge  
blanking time has been set so that current spikes caused by capaci-  
tance and rectifier reverse recovery time will not cause premature  
termination of the switching pulse. Current limit can be selected using  
the BYPASS pin capacitor (0.1 μF for normal current limit / 1 μF for  
reduced current limit). LinkSwitch-TN2 selects between normal and  
reduced current limit at power-up prior to switching.  
5.0 V Regulator and 5.2 V Shunt Voltage Clamp  
The 5.0 V regulator charges the bypass capacitor connected to the  
BYPASS pin to VBP by drawing a current from the voltage on the  
DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal  
supply voltage node for the LinkSwitch-TN2. When the MOSFET is  
on, the LinkSwitch-TN2 runs off of the energy stored in the bypass  
capacitor. Extremely low power consumption of the internal circuitry  
allows the LinkSwitch-TN2 to operate continuously from the current  
drawn from the DRAIN pin. A bypass capacitor value of 0.1 μF is  
sufficient for both high frequency decoupling and energy storage.  
Auto-Restart  
In the event of a fault condition such as output overload, output  
short, or an open-loop condition, LinkSwitch-TN2 enters into  
auto-restart operation. An internal counter clocked by the oscillator  
gets reset every time the FEEDBACK pin is pulled high. If the  
FEEDBACK pin is not pulled high for tAR(ON) (50 ms), the power  
MOSFET switching is disabled for a time equal to the auto-restart  
off-time. The first time a fault is asserted the off-time is 150 ms  
(tAR(OFF) First Off Period). If the fault condition persists, subsequent  
off-times are 1500 ms long (tAR(OFF) Subsequent Periods). The  
auto-restart alternately enables and disables the switching of the  
power MOSFET until the fault condition is removed. The auto-restart  
counter is gated by the switch oscillator.  
In addition, there is a shunt regulator clamping the BYPASS pin at  
VBP(SHUNT) (5.2 V) when current is provided to the BYPASS pin through  
an external resistor. This facilitates powering of LinkSwitch-TN2  
externally through a bias winding to decrease the no-load consump-  
tion to about 10 mW (flyback). The device stops switching instantly  
and enters auto-restart when a current ≥IBPSD is delivered into the  
BYPASS pin. Adding an external Zener diode from the output voltage  
to the BYPASS pin allows implementing an hysteretic OVP function in  
a flyback converter (see Figure 6). The current into the BYPASS pin  
should be limited to less than 16 mA.  
3
Rev. F 01/17  
www.power.com  

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