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LMS4684ITLX/NOPB PDF预览

LMS4684ITLX/NOPB

更新时间: 2024-01-07 19:08:17
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件
页数 文件大小 规格书
18页 956K
描述
0.5Ohm Low-Voltage, Dual SPDT Analog Switch

LMS4684ITLX/NOPB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:VFBGA, BGA12,3X4,20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.52模拟集成电路 - 其他类型:SPDT
JESD-30 代码:R-XBGA-B12JESD-609代码:e1
长度:2 mm湿度敏感等级:1
正常位置:NO/NC信道数量:2
功能数量:2端子数量:12
最大通态电阻 (Ron):0.8 Ω最高工作温度:85 °C
最低工作温度:-40 °C输出:SEPARATE OUTPUT
封装主体材料:UNSPECIFIED封装代码:VFBGA
封装等效代码:BGA12,3X4,20封装形状:RECTANGULAR
封装形式:GRID ARRAY, VERY THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:3 V认证状态:Not Qualified
座面最大高度:0.675 mm子类别:Multiplexer or Switches
最大供电电流 (Isup):0.000005 mA标称供电电压 (Vsup):3 V
表面贴装:YES切换:BREAK-BEFORE-MAKE
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.8 mm
Base Number Matches:1

LMS4684ITLX/NOPB 数据手册

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LMS4684  
www.ti.com  
SNOSAL0C DECEMBER 2004REVISED APRIL 2013  
LMS4684 0.5Low-Voltage, Dual SPDT Analog Switch  
Check for Samples: LMS4684  
1
FEATURES  
DESCRIPTION  
The LMS4684 is a low on-resistance, low voltage  
dual SPDT (Single-Pole/Double-Throw) analog switch  
that operates from a 1.8V to 5.5V supply. The  
LMS4684 features a 0.5RON for its NC switch and  
0.8RON for its NO switch at a 2.7V supply. The  
digital logic inputs are 1.8V logic-compatible with a  
2.7V to 3.3V supply and features break-before-make  
switching action.  
2
NC Switch RON 0.5max @ 2.7V  
NO Switch RON 0.8max @ 2.7V  
5 nA (typ) Supply Current TA = 25°C  
1.8 to 5.5V Single Supply Operation  
12-Bump DSBGA Package  
WSON-10 Package, 3x4mm  
The LMS4684 is available in the 12-bump DSBGA  
and the 10-lead WSON miniature packages. These  
PCB real estate saving packages offer extreme  
performance while saving money with small  
footprints.  
APPLICATIONS  
Power Routing  
Battery-Operated Equipment  
Communications Circuits  
Modems  
Cell Phones  
Connection Diagram  
NO1  
A3  
COM1  
B3  
IN1  
C3  
NC1  
D3  
+
1
2
3
10  
9
NO2  
V
NO1  
COM2  
+
GND  
B2  
C2  
D2  
A2  
V
IN2  
COM1  
GND  
8
7
6
4
5
NC2  
IN1  
D1  
A1  
B1  
C1  
GND  
NC1  
COM2  
IN2  
NO2  
NC2  
Center Bumps B2 and C2 are Not Electrically Connected  
Exposed pad on back of package needs to be connected to pin 6 on  
the board  
Figure 1. 10-WSON Package-Top View  
Figure 2. 12-Bump DSBGA Package-Top View  
(Bumped Side Down)  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004–2013, Texas Instruments Incorporated  

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