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LMC555CBP/NOPB PDF预览

LMC555CBP/NOPB

更新时间: 2024-02-13 22:34:38
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
19页 949K
描述
PULSE; RECTANGULAR, 3MHz, TIMER, PBGA8, ROHS COMPLIANT, MO-211BC, SMD-8

LMC555CBP/NOPB 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:FBGA,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.67模拟集成电路 - 其他类型:PULSE; RECTANGULAR
JESD-30 代码:R-PBGA-B8长度:1.412 mm
湿度敏感等级:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C最大输出频率:3 GHz
封装主体材料:PLASTIC/EPOXY封装代码:FBGA
封装形状:RECTANGULAR封装形式:GRID ARRAY, FINE PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
最大供电电压 (Vsup):12 V最小供电电压 (Vsup):1.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.5 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:1.387 mmBase Number Matches:1

LMC555CBP/NOPB 数据手册

 浏览型号LMC555CBP/NOPB的Datasheet PDF文件第3页浏览型号LMC555CBP/NOPB的Datasheet PDF文件第4页浏览型号LMC555CBP/NOPB的Datasheet PDF文件第5页浏览型号LMC555CBP/NOPB的Datasheet PDF文件第7页浏览型号LMC555CBP/NOPB的Datasheet PDF文件第8页浏览型号LMC555CBP/NOPB的Datasheet PDF文件第9页 
negative pulse to the reset terminal. The output will then  
remain in the low state until a trigger pulse is again applied.  
Application Information  
When the reset function is not use, it is recommended that it  
be connected to V+ to avoid any possibility of false triggering.  
Figure 3 is a nomograph for easy determination of RC values  
for various time delays.  
MONOSTABLE OPERATION  
In this mode of operation, the timer functions as a one-shot  
(Figure 1). The external capacitor is initially held discharged  
by internal circuitry. Upon application of a negative trigger  
pulse of less than 1/3 VS to the Trigger terminal, the flip-flop  
is set which both releases the short circuit across the capaci-  
tor and drives the output high.  
Note: In monstable operation, the trigger should be driven high before the  
end of timing cycle.  
00866911  
00866904  
FIGURE 3. Time Delay  
FIGURE 1. Monostable (One-Shot)  
The voltage across the capacitor then increases exponen-  
tially for a period of tH = 1.1 RAC, which is also the time that  
the output stays high, at the end of which time the voltage  
equals 2/3 VS. The comparator then resets the flip-flop which  
in turn discharges the capacitor and drives the output to its  
low state. Figure 2 shows the waveforms generated in this  
mode of operation. Since the charge and the threshold level  
of the comparator are both directly proportional to supply  
voltage, the timing internal is independent of supply.  
ASTABLE OPERATION  
If the circuit is connected as shown in Figure 4 (Trigger and  
Threshold terminals connected together) it will trigger itself  
and free run as a multivibrator. The external capacitor  
charges through RA + RB and discharges through RB. Thus  
the duty cycle may be precisely set by the ratio of these two  
resistors.  
00866910  
V
= 5V  
Top Trace: Input 5 V/Div.  
CC  
00866905  
TIME = 0.1 ms/Div. Middle Trace: Output 5 V/Div.  
R
= 9.1 k  
Bottom Trace: Capacitor Voltage 2 V/Div.  
A
FIGURE 4. Astable (Variable Duty Cycle Oscillator)  
C = 0.01 µF  
In this mode of operation, the capacitor charges and dis-  
charges between 1/3 VS and 2/3 VS. As in the triggered  
mode, the charge and discharge times, and therefore the  
frequency are independent of the supply voltage.  
FIGURE 2. Monostable Waveforms  
Reset overrides Trigger, which can override threshold.  
Therefore the trigger pulse must be shorter than the desired  
tH. The minimum pulse width for the Trigger is 20ns, and it is  
400ns for the Reset. During the timing cycle when the output  
is high, the further application of a trigger pulse will not effect  
the circuit so long as the trigger input is returned high at least  
10µs before the end of the timing interval. However the  
circuit can be reset during this time by the application of a  
Figure 5 shows the waveform generated in this mode of  
operation.  
5
www.national.com  

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