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LDM24 PDF预览

LDM24

更新时间: 2022-02-26 09:39:25
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MPD /
页数 文件大小 规格书
4页 607K
描述
LDM24-xx-xxx

LDM24 数据手册

 浏览型号LDM24的Datasheet PDF文件第1页浏览型号LDM24的Datasheet PDF文件第2页浏览型号LDM24的Datasheet PDF文件第4页 
www.micropowerdirect.com  
PWM Output Current Control  
An LED operates at its maximum efficiency when  
operated at the rated drive current specified by  
the manufacturer. Operating an LED at lower than  
its rated forward current not only decreases the  
system efficiency; but may cause color (or wave-  
length) shifting. In illumination applications, this  
could cause visible changes to lighting.  
A preferred method is using pulse width modula-  
tion (PWM). As shown at left, the output current  
is adjusted by applying a PWM signal to the VADJ  
input. By varying the signal duty cycle the average  
output current is adjusted up or down. To avoid  
visible flicker, the PWM signal should be greater  
than 200 Hz.  
For duty cycles (DPWM) between 0.1 and 1, the  
output current is derived by the formula:  
PWM Control Signals  
INOM IMAX X DPWM  
=
The VADJ input may be driven via an open collec-  
tor transistor (as shown). The diode and resistor  
suppress high amplitude negative spikes that may  
be caused by the drain-source capacitance of the  
transistor. Negative spikes on the control input of  
the unit could cause errors in output current or  
erratic operation.  
The VADJ input can also be driven by the open drain  
output of a microcontroller. Again, any high amplitude  
negative spikes that may be caused by the drain-  
source capacitance of the FET must be supressed.  
PWM Dimming Application  
A simple method of achieving digital (or PWM) dimming is by using a 555 timer again. The formulas for calculating the frequency and duty cycle are included  
to apply a series of pulses to the VADJ input, as illustrated above. Again, we are  
powering the LED driver with the MPM-20S-24EPB AC power supply.  
in the MPD application note “Driving LEDs”.  
The diodes (D1 and D2) allow duty cycles below 50% to be set. Diode D1  
bypasses R2 while C6 is charging. Diode D2 is optional (but recommended),  
essentially blocking R2 during the charge period. Theoretically, this circuit will  
allow for duty cycles over a range of approximately 5% to 95%. If manual  
adjustment is desired, a potentiometer may be substituted for R2 (with some  
adjustment of the circuit).  
The 555 operates over a supply voltage range of 4.5 VDC to 18VDC. Here it is  
connected to the 15 VDC output of the SR7805 switching regulator (also driven  
by the MPM-20S-24EPB). Care should be taken to minimize ripple at the VCC  
input. Excess ripple could cause timing errors.  
The timer is connected for astable (free run) operation. The frequency is set  
by R1, R2 and C6. The timing capacitor (C6) charges through R1 and D2. When  
it reaches the level of 2/3 VCC, the discharge pin (pin 7) goes low and C6 will  
discharge through D1 and R2 to the internal discharge transistor. When the C6  
voltage drops to 1/3 VCC, the discharge pin goes high and C6 begins to charge  
The size of C6 is generally not critical, but it should be as low leakage as pos-  
sible. In order to avoid excessive current flow through the internal discharge  
transistor, it is recommended that R1 be at least 5 k.  
MicroPower Direct  
292 Page Street Ste D Stoughton, MA 02072 TEL: (781) 344-8226 FAX: (781) 344-8481 E-Mail: sales@micropowerdirect.com  

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