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I0198 PDF预览

I0198

更新时间: 2022-04-27 22:42:05
品牌 Logo 应用领域
莱迪思 - LATTICE /
页数 文件大小 规格书
4页 3131K
描述
Build Leading Edge Systems with Proven 3rd Generation FPGAs

I0198 数据手册

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LOW-POWER SERDES, HIGH-SPEED DDR3, HIGH-CALIBER DSP  
LatticeECP3 Family  
Build Leading Edge Systems with  
Proven 3rd Generation FPGAs  
LatticeECP3is the best-in-class mid-range FPGA with high-  
performance SERDES, full-featured DSP blocks, and support for  
state-of-the-art memory interfaces including DDR3. It offers 35%  
to 100% more silicon resources in smaller packages compared  
to competitors. Low-power LatticeECP3 FPGAs are used in  
a wide range of applications, such as wireless and wireline  
communication, video processing, security and surveillance,  
industrial networking, industrial automation, computing, storage,  
medical equipment, and consumer.  
LatticeECP3 FPGAs offer up to 150K LUTs of logic capacity  
and 7 Mbits of memory for system integration, cascadable high-  
performance DSP blocks for signal processing, high-speed memory  
interfaces including DDR3 at 800 Mbps, and up to 1 Gbps LVDS  
performance for ADC/DAC and SPI4.2 interfaces. LatticeECP3  
further enables you to build high-speed systems with proven 3.2  
Gbps low-power SERDES qualified for a number of protocols – PCI  
Express 1.1, Ethernet (GbE, SGMII & XAUI), SMPTE SDI (3G/HD/  
SD), Serial RapidIO 2.1, low-latency CPRI, and JESD204A.  
LatticeECP3 Features and Benefits  
Embedded SERDES  
3.2Gbps operation with less than 110mW power per  
channel  
Built-in pre-emphasis and equalization  
To accelerate design of LatticeECP3 powered systems, Lattice also  
offers a number of generic and application-specific development  
kits, an expanding portfolio of free readymade reference designs,  
and a set of economical IP suites.  
Supports PCIe, Ethernet (GbE, XAUI, & SGMII), SMPTE,  
Serial RapidIO, CPRI and JESD204A  
Quad-based architecture with mix and match of different  
protocols within a quad  
FPGA Fabric Features and Capabilities  
Single-channel granularity for 3G/HD/SD SDI  
Low-Power, High-Value FPGA Fabric  
Low-power 65nm process with 4-input look-up table (LUT)  
fabric  
Support low latency variation CPRI links for multi-hop  
RRH applications  
Logic densities from 17K to 149K LUTs  
Up to 7Mbits of Embedded Block RAM (EBR) and 303Kbits of  
distributed RAM  
Cascadable DSP with ALU  
Fully cascadable slice for high performance filter and  
wide arithmetic functions  
High-Speed Embedded SERDES  
Up to 16 channels with data rates from 150Mbps to 3.2Gbps  
Less than 110mW power per channel at 3.2Gbps  
Supports PCI Express, Ethernet (GbE, XAUI, SGMII),  
SMPTE, Serial RapidIO 2.1, CPRI  
Implement rounding and truncation functions with 54-bit  
cascadable arithmetic logic unit  
Multiply, accumulate, addition and subtraction  
Up to 320 18x18 multipliers  
Flexible sysIOBuffers  
LVCMOS 33/25/18/15/12, PCI  
SSTL 33/25/18/15 & HSTL15 & HSTL18  
LVDS, Bus-LVDS, RSDS, MLVDS & LVPECL  
800Mbps DDR3  
High-Speed I/O  
Pre-engineered DDR3 memory (800Mbps)  
Up to 1Gbps LVDS  
Up to 1Gbps LVDS  
ADC/DAC, 7:1 LVDS, XGMII  
Wide Range of Package & User I/O Options  
Up to 586 user I/O pins  
Advanced Configuration Options  
Configure with SPI boot flash or parallel burst mode flash  
Proven low-cost wirebond fpBGA packages  
Density migration across all densities  
Pb-free / RoHS-compliant  
sysCLOCKPLL and DLL  
2 DLLs per device, 2 to 10 PLLs per device  
Protect your designs with 128-bit AES  
Dual-boot provides backup configuration copy  
TransFRI/O support updates while system operates  
LATTICESEMI.COM  

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