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L7C162CC15 PDF预览

L7C162CC15

更新时间： 2024-01-21 01:41:37
品牌 Logo 应用领域
逻辑 - LOGIC 静态存储器内存集成电路
页数 文件大小 规格书
7页 143K
描述
Standard SRAM, 16KX4, 15ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28

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L7C162CC15 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：DIP, DIP28,.3
针数：28Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.41
风险等级：5.92最长访问时间：15 ns
其他特性：AUTOMATIC POWER-DOWNI/O 类型：SEPARATE
JESD-30 代码：R-GDIP-T28JESD-609代码：e0
长度：36.83 mm内存密度：65536 bit
内存集成电路类型：STANDARD SRAM内存宽度：4
湿度敏感等级：3功能数量：1
端口数量：1端子数量：28
字数：16384 words字数代码：16000
工作模式：ASYNCHRONOUS最高工作温度：70 °C
最低工作温度：组织：16KX4
输出特性：3-STATE可输出：YES
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP28,.3封装形状：RECTANGULAR
封装形式：IN-LINE并行/串行：PARALLEL
峰值回流温度（摄氏度）：225电源：5 V
认证状态：Not Qualified座面最大高度：5.08 mm
最大待机电流：0.00015 A最小待机电流：2 V
子类别：SRAMs最大压摆率：0.14 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

L7C162CC15 数据手册

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L7C162  
16K x 4 Static RAM  
DEVICES INCORPORATED  
FEATURES  
DESCRIPTION  
The L7C162 is a high-performance,  
low-power CMOS static RAM. The  
storage cells are organized as 16,384  
storage with a supply voltage as low  
as 2 V. The L7C162 consumes only  
30 µW (typical) at 3 V, allowing  
q 16K x 4 Static RAM with Separate  
I/O and High Impedance Write  
q Auto-Powerdown™ Design  
q Advanced CMOS Technology  
q High Speed — to 12 ns maximum  
q Low Power Operation  
Active: 325 mW typical at 25 ns  
Standby: 400 µW typical  
words by 4 bits per word. Data In and effective battery backup operation.  
Data Out are separate. This device is  
The L7C162 provides asynchronous  
available in four speeds with maxi-  
(unclocked) operation with matching  
mum access times from 12 ns to 25 ns.  
access and cycle times. Two active-  
Inputs and outputs are TTL compat-  
ible. Operation is from a single +5 V  
low Chip Enables and a three-state  
output with a separate Output Enable  
q Data Retention at 2 V for Battery  
power supply. Power consumption is control simplify the connection of  
325 mW (typical) at 25 ns. Dissipation several chips for increased storage  
Backup Operation  
q DSCC SMD No. 5962-89712  
drops to 60 mW (typical) when the  
memory is deselected.  
capacity.  
q Available 100% Screened to  
MIL-STD-883, Class B  
Memory locations are specified on  
address pins A0 through A13. Reading  
from a designated location is accom-  
plished by presenting an address and  
driving CE1, CE2, and OE LOW while  
WE remains HIGH. The data in the  
addressed memory location will then  
appear on the Data Out pins within  
one access time. The output pins stay  
in a high-impedance state when WE is  
LOW or CE1, CE2, or OE is HIGH.  
Two standby modes are available.  
Proprietary Auto-Powerdown™  
circuitry reduces power consumption  
automatically during read or write  
accesses which are longer than the  
minimum access time, or when the  
memory is deselected. In addition,  
data may be retained in inactive  
q Plug Compatible with IDT 71982  
and Cypress CY7C162  
q Package Styles Available:  
• 28-pin Plastic DIP  
• 28-pin Ceramic DIP  
• 28-pin Plastic SOJ  
• 28-pin Ceramic LCC  
L7C162 BLOCK DIAGRAM  
Writing to an addressed location is  
accomplished when the active-low  
CE1, CE2, and WE inputs are all LOW.  
Any of these signals may be used to  
terminate the write operation. The  
Data In and Data Out signals have the  
same polarity.  
256 x 64 x 4  
MEMORY  
ARRAY  
8
ROW  
ADDRESS  
Latchup and static discharge protec-  
tion are provided on-chip. The  
L7C162 can withstand an injection  
current of up to 200 mA on any pin  
without damage.  
CE  
CE  
1
2
4
COLUMN SELECT  
& COLUMN SENSE  
O
3-0  
CONTROL  
WE  
OE  
6
I
3-0  
4
COLUMN ADDRESS  
OBSOLETE  
64K Static RAMs  
03/04/99–LDS.162-E  
1
1234567

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