Datasheet > K4T1G164QD-ZCE70

K4T1G164QD-ZCE70

更新时间： 2024-01-14 19:46:47

品牌	Logo	应用领域
三星 - SAMSUNG		时钟动态存储器双倍数据速率内存集成电路
页数	文件大小	规格书
46页	962K
描述
DDR DRAM, 64MX16, 0.4ns, CMOS, PBGA84, FBGA-84

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K4T1G164QD-ZCE70 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	BGA	包装说明：	TFBGA, BGA84,9X15,32
针数：	84	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.32.00.32
风险等级：	5.69	访问模式：	MULTI BANK PAGE BURST
最长访问时间：	0.4 ns	其他特性：	AUTO/SELF REFRESH
最大时钟频率 (fCLK)：	400 MHz	I/O 类型：	COMMON
交错的突发长度：	4,8	JESD-30 代码：	R-PBGA-B84
长度：	13 mm	内存密度：	1073741824 bit
内存集成电路类型：	DDR DRAM	内存宽度：	16
功能数量：	1	端口数量：	1
端子数量：	84	字数：	67108864 words
字数代码：	64000000	工作模式：	SYNCHRONOUS
最高工作温度：	95 °C	最低工作温度：
组织：	64MX16	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TFBGA
封装等效代码：	BGA84,9X15,32	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY, THIN PROFILE, FINE PITCH	电源：	1.8 V
认证状态：	Not Qualified	刷新周期：	8192
座面最大高度：	1.2 mm	自我刷新：	YES
连续突发长度：	4,8	最大待机电流：	0.015 A
子类别：	DRAMs	最大压摆率：	0.28 mA
最大供电电压 (Vsup)：	1.9 V	最小供电电压 (Vsup)：	1.7 V
标称供电电压 (Vsup)：	1.8 V	表面贴装：	YES
技术：	CMOS	温度等级：	OTHER
端子形式：	BALL	端子节距：	0.8 mm
端子位置：	BOTTOM	宽度：	9 mm
Base Number Matches：	1

K4T1G164QD-ZCE70 数据手册

K4T1G084QD

K4T1G164QD

DDR2 SDRAM

1.0 Ordering Information

Org.

DDR2-800 5-5-5

DDR2-800 6-6-6

DDR2-667 5-5-5

DDR2-533 4-4-4

DDR2-400 3-3-3

Package

128Mx8 K4T1G084QD-ZC(L)E7 K4T1G084QD-ZC(L)F7 K4T1G084QD-ZC(L)E6 K4T1G084QD-ZC(L)D5 K4T1G084QD-ZC(L)CC 60 FBGA

64Mx16 K4T1G164QD-ZC(L)E7 K4T1G164QD-ZC(L)F7 K4T1G164QD-ZC(L)E6 K4T1G164QD-ZC(L)D5 K4T1G164QD-ZC(L)CC 84 FBGA

Note :

1. Speed bin is in order of CL-tRCD-tRP.

2. RoHS Compliant.

2.0 Key Features

Speed

CAS Latency

tRCD(min)

tRP(min)

DDR2-800 5-5-5

DDR2-800 6-6-6

DDR2-667 5-5-5

DDR2-533 4-4-4

DDR2-400 3-3-3

Units

tCK

12.5

57.5

tRC(min)

• JEDEC standard V_DD= 1.8V ± 0.1V Power Supply

• V_DDQ= 1.8V ± 0.1V

The 1Gb DDR2 SDRAM is organized as a 16Mbit x 8 I/Os x

8banks or 8Mbit x 16 I/Os x 8 banks device. This synchronous

device achieves high speed double-data-rate transfer rates of up

to 800Mb/sec/pin (DDR2-800) for general applications.

The chip is designed to comply with the following key DDR2

SDRAM features such as posted CAS with additive latency, write

latency = read latency - 1, Off-Chip Driver(OCD) impedance

adjustment and On Die Termination.

• 200 MHz f_CKfor 400Mb/sec/pin, 267MHz f_CKfor 533Mb/sec/

pin, 333MHz f_CKfor 667Mb/sec/pin, 400MHz f_CKfor 800Mb/

sec/pin

• 8 Banks

• Posted CAS

• Programmable CAS Latency: 3, 4, 5, 6

• Programmable Additive Latency: 0, 1, 2, 3, 4, 5

• Write Latency(WL) = Read Latency(RL) -1

• Burst Length: 4 , 8(Interleave/Nibble sequential)

• Programmable Sequential / Interleave Burst Mode

• Bi-directional Differential Data-Strobe (Single-ended data-

strobe is an optional feature)

• Off-Chip Driver(OCD) Impedance Adjustment

• On Die Termination

All of the control and address inputs are synchronized with a pair

of externally supplied differential clocks. Inputs are latched at the

crosspoint of differential clocks (CK rising and CK falling). All I/Os

are synchronized with a pair of bidirectional strobes (DQS and

DQS) in a source synchronous fashion. The address bus is used

to convey row, column, and bank address information in a RAS/

CAS multiplexing style. For example, 1Gb(x8) device receive 14/

10/3 addressing.

The 1Gb DDR2 device operates with a single 1.8V ± 0.1V power

supply and 1.8V ± 0.1V V_DDQ

The 1Gb DDR2 device is available in 60ball FBGAs(x8) and in

84ball FBGAs(x16).

• Special Function Support

- 50ohm ODT

Note : The functionality described and the timing specifications included in

this data sheet are for the DLL Enabled mode of operation.

- High Temperature Self-Refresh rate enable

• Average Refresh Period 7.8us at lower than T_CASE85°C,

3.9us at 85°C < T_CASE< 95 °C

• All of products are Lead-Free and RoHS compliant

Note : This data sheet is an abstract of full DDR2 specification and does not cover the common features which are described in “DDR2 SDRAM Device

Operation & Timing Diagram”.

4 of 46

Rev. 1.2 July 2008

1 2 345 6 7...46

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与K4T1G164QD-ZCE70相关器件

型号	品牌	描述	获取价格	数据表
K4T1G164QD-ZCE7T	SAMSUNG	DDR DRAM, 64MX16, 0.4ns, CMOS, PBGA84	获取价格
K4T1G164QD-ZCF7	SAMSUNG	DDR DRAM, 64MX16, 0.4ns, CMOS, PBGA84	获取价格
K4T1G164QD-ZCF70	SAMSUNG	DDR DRAM, 64MX16, 0.4ns, CMOS, PBGA84, FBGA-84	获取价格
K4T1G164QD-ZCF7T	SAMSUNG	DDR DRAM, 64MX16, 0.4ns, CMOS, PBGA84	获取价格
K4T1G164QD-ZLCC	SAMSUNG	DDR DRAM, 64MX16, 0.6ns, CMOS, PBGA84	获取价格
K4T1G164QD-ZLCC0	SAMSUNG	DDR DRAM, 64MX16, 0.6ns, CMOS, PBGA84, ROHS COMPLIANT, FBGA-84	获取价格

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