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IT120

更新时间： 2024-01-21 08:21:42
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MICROSS /
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1页 284K
描述
Linear Systems replaces discontinued Intersil IT120

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中文翻译

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IT120 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Contact Manufacturer零件包装代码：DIP
包装说明：IN-LINE, R-PDIP-T8针数：8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8541.21.00.75风险等级：5.3
最大集电极电流 (IC)：0.01 A集电极-发射极最大电压：45 V
配置：SEPARATE, 2 ELEMENTS最小直流电流增益 (hFE)：225
JESD-30 代码：R-PDIP-T8JESD-609代码：e3
湿度敏感等级：1元件数量：2
端子数量：8封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：260极性/信道类型：NPN
认证状态：Not Qualified表面贴装：NO
端子面层：Matte Tin (Sn)端子形式：THROUGH-HOLE
端子位置：DUAL处于峰值回流温度下的最长时间：40
晶体管元件材料：SILICON标称过渡频率 (fT)：220 MHz
Base Number Matches：1

IT120 数据手册

  
IT120  
MONOLITHIC DUAL  
NPN TRANSISTOR  
Linear Systems replaces discontinued Intersil IT120  
FEATURES  
The IT120 is a monolithic pair of NPN transistors  
Direct Replacement for INTERSIL IT120  
HIGH hFE @ LOW CURRENT  
OUTPUT CAPACITANCE  
mounted in a single TO-78 package. The monolithic  
dual chip design reduces parasitics and gives better  
performance while ensuring extremely tight matching.  
The IT120 is a direct replacement for discontinued  
Intersil IT120.  
≥ 200 @ 10µA  
≤ 2.0pF  
≤ 5.0µV°C  
VBE tracking  
ABSOLUTE MAXIMUM RATINGS 1  
@ 25°C (unless otherwise noted)  
The hermetically sealed TO-78 is well suited for hi-rel  
and harsh environment applications.  
Maximum Temperatures  
Storage Temperature  
‐65°C to +200°C  
‐55°C to +150°C  
(See Packaging Information).  
Operating Junction Temperature  
Maximum Power Dissipation  
Continuous Power Dissipation (One side)  
Continuous Power Dissipation (Both sides)  
Linear Derating factor (One side)  
Linear Derating factor (Both sides)  
Maximum Currents  
IT120 Features:  
250mW  
500mW  
2.3mW/°C  
4.3mW/°C  
ƒ
ƒ
ƒ
ƒ
High hfe at low current  
Tight matching  
Tight VBE tracking  
Low Output Capacitance  
Collector Current  
10mA  
MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated)  
SYMBOL  
|VBE1 – VBE2  
∆|(VBE1 – VBE2)| / ∆T  
CHARACTERISTIC  
MIN  
‐‐  
‐‐  
TYP  
‐‐  
‐‐  
MAX  
2
5
UNITS  
mV  
µV/°C  
CONDITIONS  
|
Base Emitter Voltage Differential  
Base Emitter Voltage Differential  
Change with Temperature  
Base Current Differential  
IC = 10µA, VCE = 5V  
IC = 10µA, VCE = 5V  
TA = ‐55°C to +125°C  
IC = 10µA, VCE = 5V  
|IB1 – IB2  
|
‐‐  
‐‐  
5
nA  
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)  
SYMBOL  
BVCBO  
BVCEO  
BVEBO  
BVCCO  
hFE  
CHARACTERISTICS  
MIN.  
45  
TYP.  
‐‐  
MAX.  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
0.5  
1
1
2
2
10  
‐‐  
3
UNITS  
V
V
V
V
CONDITIONS  
IC = 10µA, IE = 0  
Collector to Base Voltage  
Click To Buy  
Collector to Emitter Voltage  
Emitter‐Base Breakdown Voltage  
Collector to Collector Voltage  
DC Current Gain  
45  
6.2  
60  
200  
225  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
‐‐  
IC = 10µA, IB = 0  
IE = 10µA, IC = 02  
IC = 10µA, IE = 0  
IC = 10µA, VCE = 5V  
IC = 1.0mA, VCE = 5V  
IC = 0.5mA, IB = 0.05mA  
IC = 0, VEB = 3V  
VCE(SAT)  
IEBO  
ICBO  
COBO  
CC1C2  
IC1C2  
fT  
Collector Saturation Voltage  
Emitter Cutoff Current  
V
nA  
nA  
pF  
Collector Cutoff Current  
Output Capacitance  
Collector to Collector Capacitance  
Collector to Collector Leakage Current  
Current Gain Bandwidth Product  
Narrow Band Noise Figure  
IE = 0, VCB = 45V  
IE = 0, VCB = 5V  
VCC = 0V  
VCC = ±60V  
pF  
‐‐  
220  
‐‐  
nA  
MHz  
dB  
IC = 1mA, VCE = 5V  
IC = 100µA, VCE = 5V, BW=200Hz, RG= 10KΩ,  
f = 1KHz  
NF  
Notes:  
1. Absolute Maximum ratings are limiting values above which serviceability may be impaired  
2. The reverse base‐to‐emitter voltage must never exceed 6.2 volts; the reverse base‐to‐emitter current must never exceed 10µA.  
TO-78 (Bottom View)  
Available Packages:  
IT120 in TO-78  
IT120 available as bare die  
Please contact Micross for full package and die dimensions:  
Email: chipcomponents@micross.com  
Web: www.micross.com/distribution.aspx  
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or  
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.  
1

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