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ISPGDX120A-7Q160 PDF预览

ISPGDX120A-7Q160

更新时间： 2024-01-14 00:22:29
品牌 Logo 应用领域
莱迪思 - LATTICE /
页数 文件大小 规格书
25页 326K
描述
In-System Programmable Generic Digital CrosspointTM

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ISPGDX120A-7Q160 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFP包装说明：PLASTIC, QFP-160
针数：160Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.68边界扫描：YES
最大时钟频率：80 MHzJESD-30 代码：S-PQFP-G160
JESD-609代码：e0长度：28 mm
低功率模式：NO湿度敏感等级：3
端子数量：160最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装形状：SQUARE
封装形式：FLATPACK峰值回流温度（摄氏度）：225
认证状态：Not Qualified座面最大高度：4.1 mm
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn85Pb15)端子形式：GULL WING
端子节距：0.65 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：28 mm
uPs/uCs/外围集成电路类型：DSP PERIPHERAL, CROSSBAR SWITCHBase Number Matches：1

ISPGDX120A-7Q160 数据手册

 浏览型号ISPGDX120A-7Q160的Datasheet PDF文件第2页浏览型号ISPGDX120A-7Q160的Datasheet PDF文件第3页浏览型号ISPGDX120A-7Q160的Datasheet PDF文件第4页浏览型号ISPGDX120A-7Q160的Datasheet PDF文件第5页浏览型号ISPGDX120A-7Q160的Datasheet PDF文件第6页浏览型号ISPGDX120A-7Q160的Datasheet PDF文件第7页 
TM  
ispGDX Family  
In-System Programmable  
TM  
Generic Digital Crosspoint  
Features  
Functional Block Diagram  
• IN-SYSTEM PROGRAMMABLE GENERIC DIGITAL  
CROSSPOINT FAMILY  
ISP  
Control  
I/O Pins D  
— Advanced Architecture Addresses Programmable  
PCB Interconnect, Bus Interface Integration and  
Jumper/Switch Replacement  
— Three Device Options: 80 to 160 Programmable I/O  
Pins  
— “Any Input to Any Output” Routing  
— Fixed HIGH or LOW Output Option for Jumper/DIP  
Switch Emulation  
— Space-Saving TQFP, PQFP and BGA Packaging  
— Dedicated IEEE 1149.1-Compliant Boundary Scan  
Test  
Global Routing  
Pool  
I/O  
Cells  
I/O  
Cells  
(GRP)  
— PCI Compliant Output Drive  
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY  
— 5V Power Supply  
— 5.0ns Input-to-Output/5.0ns Clock-to-Output Delay  
— Low-Power: 40mA Quiescent Icc  
— Balanced 24mA Output Buffers with Programmable  
Slew Rate Control  
— Schmitt Trigger Inputs for Noise Immunity  
— Electrically Erasable and Reprogrammable  
— Non-Volatile E2CMOS Technology  
— 100% Tested  
Boundary  
Scan  
I/O Pins B  
Control  
Description  
• ispGDX OFFERS THE FOLLOWING ADVANTAGES  
TheispGDXarchitectureprovidesafamilyoffast,flexible  
programmable devices to address a variety of system-  
level digital signal routing and interface requirements  
including:  
— In-System Programmable  
— Lattice ISP or JTAG Programming Interface  
— Only 5V Power Supply Required  
— Change Interconnects in Seconds  
— Reprogram Soldered Devices  
• Multi-Port Multiprocessor Interfaces  
• FLEXIBLE ARCHITECTURE  
• Wide Data and Address Bus Multiplexing  
(e.g. 4:1 High-Speed Bus MUX)  
— Combinatorial/Latched/Registered Inputs or Outputs  
— Individual I/O Tri-state Control with Polarity Control  
— Dedicated Clock Input Pins (two or four) or  
Programmable Clocks from I/O Pins (from 20 up to  
40)  
• Programmable Control Signal Routing  
(e.g. Interrupts, DMAREQs, etc)  
— Up to 4:1 Dynamic Path Selection  
— Programmable Output Pull-up Resistors  
— Outputs Tri-state During Power-up (“Live Insertion”  
Friendly)  
• Board-Level PCB Signal Routing for Prototyping or  
Programmable Bus Interfaces  
The ispGDX Family consists of three members with 80,  
120 and 160 Programmable I/Os. These devices are  
available in packages ranging from the 100-pin TQFP to  
the 208-pin PQFP. The devices feature fast operation,  
with input-to-output signal delays (Tpd) of 5ns and clock-  
to-output delays of 5ns.  
• DESIGN SUPPORT THROUGH LATTICE’S ispGDX  
DEVELOPMENT SOFTWARE  
— MS Windows or NT / PC-Based or Sun O/S  
— Easy Text-Based Design Entry  
— Automatic Signal Routing  
— Program up to 100 ISP Devices Concurrently  
— Simulator Netlist Generation for Easy Board-Level  
Simulation  
The architecture of the devices consists of a series of  
programmableI/OcellsinterconnectedbyaGlobalRout-  
Copyright © 2000 Lattice Semiconductor Corporation. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein  
are subject to change without notice.  
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.  
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com  
August 2000  
ispgdx_08  
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中文翻译

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