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ISO6760LDWR

更新时间： 2024-02-09 18:02:54
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德州仪器 - TI /
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44页 2938K
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ISO6760L Six-Channel Reinforced Digital Isolators with Integrated Interlock and Robust EMC

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ISO6760LDWR 数据手册

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ISO6760L  
SLLSFO3 – DECEMBER 2021  
ISO6760L Six-Channel Reinforced Digital Isolators with Integrated Interlock and  
Robust EMC  
1 Features  
3 Description  
•
ISO6760 with integrated Interlock function  
– Designed to support opposite polarity of  
adjacent channels  
– Three sets of paired interlock channels  
Robust isolation barrier:  
– High lifetime at 1500 VRMS working voltage  
– Up to 5000 VRMS isolation rating  
– Up to 10 kV surge capability  
– ±130 kV/μs typical CMTI  
Wide supply range: 1.71 V to 1.89 V and 2.25 V to  
5.5 V  
Channel output non-inverting (ISO6760L) and  
inverting (ISO6760LN) options  
50 Mbps data rate  
The ISO6760L and ISO6760LN devices are high-  
performance, six-channel digital isolators with  
integrated interlock function for applications requiring  
up to 5000 VRMS isolation ratings per UL 1577. These  
devices are also certified by VDE, TUV, CSA, and  
CQC.  
•
The ISO6760L family of devices integrate a series of  
logic gates to provide hardware interlock functionality  
for adjacent channels. The interlock feature ensures  
that each channel, in a channel pairing, will not be  
enabled at the same time. If both channels in the  
pairing share the same input logic, the output logic will  
always be low. The ISO6760L family of devices have  
all six channels in the same direction and provide  
high electromagnetic immunity and low emissions at  
low power consumption, while isolating CMOS or  
LVCMOS digital I/Os. Each isolation channel has a  
logic input and output buffer separated by TI's double  
capacitive silicon dioxide (SiO2) insulation barrier.  
•
•
•
•
•
•
•
1.71 V to 5.5 V level translation  
Wide temperature range: –40°C to 125°C  
1.4 mA per channel typical at 1 Mbps  
Robust electromagnetic compatibility (EMC)  
– System-level ESD, EFT, and surge immunity  
– Low emissions  
Used in conjunction with intelligent power modules  
(IPMs), the interlock feature in these devices help  
prevent shoot through current between the high  
side and low side gate driver during turn on  
and turn off events. Six channels, including three  
pairings of interlock circuitry, are integrated in a  
16-pin SOIC wide-body (DW) package with space  
savings greater than 50% compared to optocoupler  
solutions. Through innovative chip design and layout  
techniques, the electromagnetic compatibility of the  
ISO6760L devices has been significantly enhanced to  
ease system-level ESD, EFT, surge, and emissions  
compliance.  
•
•
Wide-SOIC (DW-16) Package  
Safety-Related Certifications (pending):  
– DIN VDE V 0884-11:2017-01  
– UL 1577 component recognition program  
– IEC 62368-1, IEC 61010-1, IEC 60601-1 and  
GB 4943.1-2011 certifications  
2 Applications  
•
•
•
•
Motor drives  
Appliances  
Grid  
Building Automation  
Device Description  
Part Number  
ISO6760L,  
Package  
SOIC (DW)  
ISO6760L  
Body Size  
10.30 mm × 7.50  
mm  
ISO6760LN  
IPM  
VCC1  
1
2
3
4
5
6
7
8
16 VCC2  
I
N
T
E
R
L
O
C
K
High side  
gate driver  
INA_H  
INA_L  
INB_H  
INB_L  
INC_H  
INC_L  
GND1  
OUTA_H  
OUTA_L  
OUTB_H  
OUTB_L  
OUTC_H  
OUTC_L  
GND2  
15  
14  
13  
12  
11  
10  
9
Level  
shift  
High side  
gate driver  
I
High side  
gate driver  
N
T
E
R
L
O
C
K
C2000  
MCU  
3
phase  
IGBT  
M
inverter  
I
N
T
E
R
L
O
C
K
Low side  
gate driver  
Simplified Schematic  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
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