Datasheet > ISL78419

ISL78419

更新时间： 2023-12-20 18:45:17

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
20页	1366K
描述
Integrated Automotive TFT-LCD Power Supply Regulator

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数据手册

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ISL78419 数据手册

ISL78419

Application Diagram

VIN

AVDD

L1 10µH

C1, 2

20µF

C4, 5, 6

30µF

0.1µF

73.2k

VIN

C32

0.1µF

PGND

AVDD BOOST

CONTROLLER

V_IN

SEQUENCER

FREQ

R2 8.06k

COMP

R12 5.5k C20 15nF

L_IN

VOFF

C16

LDO VIN

C25

1µF

VLOGIC

C11 C15

0.1µF 1µF

R6 1k

1µF

L_OUT

VLOGIC

AVDD

LDO

C24

2.2µF

47nF

C10

47nF

R17

8.25k

VON

R18

3.92k

D2 C9

1µF

C12

1µF

VFLK

VGH

ADJ

C17

C14

1nF

VDPM

C28

0.1µF

SCL

100pF

GPM

10k

SDA

RSET

POS

VGH GPM

R5 100k

DCP

VGHM

R22 22k

GPM_LO

133k

AVDD

VGH

C18

0.47µF

R14 85k

83k

R26 100k

AVDD

OUT

VDIV

AVDD

V_IN

VCOM

VOLTAGE

DETECTOR

C19

0.47µF

VCOM OP

OPEN

R15 115k

NEG

CD2

C26 1nF

RESET

THERMAL PAD

R16

10k

VLOGIC

Pin Descriptions

PIN#

SYMBOL

DESCRIPTION

AV boost converter feedback. Connect to the center of a voltage divider between AV and GND to set the AV voltage.

PGND

Power ground

Gate Pulse Modulator Delay Control. Connect a capacitor between this pin and GND to set the delay time.

Gate Pulse Modulator Slew Control. Connect a resistor between this pin and GND to set the falling slew rate.

Gate Pulse Modulator High Voltage Input. Place a 0.1µF decoupling capacitor close to the VGH pin.

Gate Pulse Modulator Output for gate driver IC

VGH

VGHM

VFLK

VDPM

Gate Pulse Modulator Control input from T

CON

Gate Pulse Modulator Enable. Connect a capacitor from VDPM to GND to set the delay time before GPM is enabled. A current

source charges the capacitor on VDPM.

GPM_LO Gate Pulse Modulator Low Voltage Input; place a 0.47µF decoupling capacitor close to the GPM_LO pin.

AVDD

SCL

DCP and VCOM amplifier high voltage analog supply; place a 0.47µF decoupling capacitor close to the AVDD pin.

I C compatible clock input

FN8292 Rev 3.00

June 27, 2014

Page 3 of 20

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