Datasheet > ISL6262CRZ-T

ISL6262CRZ-T

更新时间： 2024-02-17 01:31:32

品牌	Logo	应用领域
英特矽尔 - INTERSIL		开关输出元件
页数	文件大小	规格书
27页	562K
描述
Two-Phase Core Regulator for IMVP-6 Mobile CPUs

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技术参数
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ISL6262CRZ-T 技术参数

生命周期：	Unknown	零件包装代码：	QFN
包装说明：	HVQCCN,	针数：	48
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	6 weeks
风险等级：	5.12	其他特性：	ALSO ADJUSTABLE OUTPUT FROM 0.75 TO 1.5V; PWM CONTROL TECHNIQUE ALSO POSSIBLE
模拟集成电路 - 其他类型：	DUAL SWITCHING CONTROLLER	控制模式：	CURRENT-MODE
控制技术：	HYSTERETIC CURRENT MODE	最大输入电压：	5.25 V
最小输入电压：	4.75 V	标称输入电压：	5 V
JESD-30 代码：	S-PQCC-N48	JESD-609代码：	e3
长度：	7 mm	湿度敏感等级：	2
功能数量：	1	端子数量：	48
最高工作温度：	100 °C	最低工作温度：	-10 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	HVQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	认证状态：	Not Qualified
座面最大高度：	1 mm	表面贴装：	YES
切换器配置：	PHASE-SHIFT	最大切换频率：	500 kHz
温度等级：	OTHER	端子面层：	Matte Tin (Sn) - annealed
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	7 mm	Base Number Matches：	1

ISL6262CRZ-T 数据手册

ISL6262

SOFT - A capacitor from this pin to GND pin sets the

maximum slew rate of the output voltage. The SOFT pin is

the non-inverting input of the error amplifier.

LGATE1 - Lower-side MOSFET gate signal for phase 1.

PGND1 - The return path of the lower gate driver for

phase 1.

OCSET - Overcurrent set input. A resistor from this pin to

VO sets DROOP voltage limit for OC trip. A 10µA current

source is connected internally to this pin.

PHASE1 - The phase node of phase 1. This pin should

connect to the source of upper MOSFET.

UGATE1 - Upper MOSFET gate signal for phase 1.

VW - A resistor from this pin to COMP programs the

switching frequency (exa. 4.42kΩ ≅ 300kHz).

BOOT1 - This pin is the upper gate driver supply voltage for

phase 1. An internal boot strap diode is connected to the

PVCC pin.

COMP - This pin is the output of the error amplifier.

FB - This pin is the inverting input of error amplifier.

VID0, VID1, VID2, VID3, VID4, VID5, VID6 - VID input with

VID0 is the least significant bit (LSB) and VID6 is the most

significant bit (MSB).

FB2 - There is a switch between FB2 pin and the FB pin.

The switch is closed in single-phase operation and is

opened in two phase operation. The components connecting

to FB2 is to adjust the compensation in single phase

operation to achieve optimum performance.

VR_ON - Digital input enable. A high level logic signal on

this pin enables the regulator.

DPRSLPVR - Deeper sleep enable signal. A high level logic

indicates the micro-processor is in Deeper Sleep Mode and

also indicates a slow C4 entry or exit rate with 41µA

discharging or charging the SOFT cap.

VDIFF - This pin is the output of the differential amplifier.

VSEN - Remote core voltage sense input.

RTN - Remote core voltage sense return.

DPRSTP# - Deeper sleep slow wake up signal. A low level

logic signal on this pin indicates the micro-processor is in

deeper sleep mode.

DROOP - Output of the droop amplifier. The voltage level on

this pin is the sum of Vo and the programmed droop voltage

by the external resistors.

CLK_EN# - Digital output for system PLL clock. Goes active

10µs after PGD_IN is active and Vcore is within 10% of Boot

voltage.

DFB - Inverting input to droop amplifier.

VO - An input to the IC that reports the local output voltage.

VSUM - This pin is connected to the summation junction of

3V3 - 3.3V supply voltage for CLK_EN#.

channel current sensing.

VIN - Battery supply voltage. It is used for input voltage

feedforward to improve the input line transient performance.

VSS - Signal ground. Connect to local controller ground.

VDD - 5V control power supply.

ISEN2 - Individual current sharing sensing for channel 2.

ISEN1 - Individual current sharing sensing for channel 1.

N/C - Not connected. Grounding this pin to signal ground in

the practical layout.

BOOT2 - This pin is the upper gate driver supply voltage for

phase 2. An internal boot strap diode is connected to the

PVCC pin.

UGATE2 - Upper MOSFET gate signal for phase 2.

PHASE2 - The phase node of phase 2. This pin should

connect to the source of upper MOSFET.

PGND2 - The return path of the lower gate driver for

phase 2.

LGATE2 - Lower-side MOSFET gate signal for phase 2.

PVCC - 5V power supply for gate drivers.

FN9199.2

May 15, 2006

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