HS-65647RH
TM
Data Sheet
August 2000
File Number 2928.3
Radiation Hardened 8K x 8 SOS CMOS
Static RAM
Features
• Electrically Screened to SMD # 5962-95823
The Intersil HS-65647RH is a fully asynchronous 8K x 8
radiation hardened static RAM. This RAM is fabricated using
the Intersil 1.2 micron silicon-on-sapphire CMOS technology.
This technology gives exceptional hardness to all types of
radiation, including neutron fluence, total ionizing dose, high
intensity ionizing dose rates, and cosmic rays.
• QML Qualified per MIL-PRF-38535 Requirements
• 1.2 Micron Radiation Hardened SOS CMOS
- Total Dose. . . . . . . . . . . . . . . . . . . . . 300 krad(Si) (Max)
11
- Transient Upset. . . . . . . . . . . . . . . . .>1 x 10 rad(Si)/s
-12
- Single Event Upset . . . . . . . . < 1 x 10
Errors/Bit-Day
• Latch-up Free
Low power operation is provided by a fully static design. Low
standby power can be achieved without pull-up resistors,
due to the gated input buffer design.
• LET Threshold . . . . . . . . . . . . . . . . . . >250 MEV/mg/cm2
• Low Standby Supply Current . . . . . . . . . . . . . 10mA (Max)
• Low Operating Supply Current . . . . . . . . . .100mA (2MHz)
• Fast Access Time. . . . . . . . . . . . . 50ns (Max), 35ns (Typ)
• High Output Drive Capability
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-95823. A “hot-link” is provided
on our homepage for downloading.
• Gated Input Buffers (Gated by E2)
• Six Transistor Memory Cell
www.intersil.com/spacedefense/space.asp
• Fully Static Design
Ordering Information
• Asynchronous Operation
INTERNAL MKT.
NUMBER
TEMP.
• CMOS Inputs
o
ORDERING NUMBER
5962F9582301QXC
5962F9582301QYC
5962F9582301VXC
5962F9582301VYC
RANGE ( C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
• 5V Single Power Supply
HS1-65647RH-8
o
o
• Military Temperature Range . . . . . . . . . . . -55 C to 125 C
• Industry Standard JEDEC Pinout
HS-965647RH-8
HS1-65647RH-Q
HS9-65647RH-Q
Functional Diagram
HS1-65647RH/PROTO HS1-65647RH/PROTO
HS9-65647RH/PROTO HS9-65647RH/PROTO
AI
ROW
ROW
DECODER
128 X 512
MEMORY ARRAY
TRUTH TABLE
I/O0
E1
X
1
E2
0
G
X
X
1
W
X
X
1
MODE
INPUT
DATA
CIRCUIT
COLUMN I/O
Low Power Standby
Disabled
Enabled
COLUMN DECODER
1
I/O7
E2
0
1
AI COL
0
1
0
1
Read
0
1
X
0
Write
E1
CONTROL
CIRCUIT
G
W
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
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