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INN3672C-H601-TL PDF预览

INN3672C-H601-TL

更新时间: 2022-09-29 19:49:56
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帕沃英蒂格盛 - POWERINT /
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30页 2447K
描述
IC OFFLINE SWITCH SR CONTROL

INN3672C-H601-TL 数据手册

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InnoSwitch3-EP  
Pin Functional Description  
ISENSE (IS) Pin (Pin 1)  
Connection to the power supply output terminals. An external  
current sense resistor should be connected between this and the  
GND pin. If current regulation is not required, this pin should be tied  
to the GND pin.  
ꢀ ꢁ3  
ꢅPP ꢁꢆ  
ꢃꢄ ꢁꢇ  
ꢁꢂ ꢃꢄ  
ꢁꢁ ꢃꢄ  
ꢁꢈ ꢃꢄ  
ꢉ ꢃꢄ  
SECONDARY GROUND (GND) (Pin 2)  
ꢌ ꢃꢄ  
GND for the secondary IC. Note this is not the power supply output  
GND due to the presence of the sense resistor between this and the  
ISENSE pin.  
S ꢁꢊ-ꢁꢉ  
ꢍ ꢎꢏꢋ  
ꢊ ꢀꢐꢑꢒ  
ꢇ Sꢓ  
ꢆ ꢅPS  
3 ꢎꢅ  
FEEDBACK (FB) Pin (Pin 3)  
Connection to an external resistor divider to set the power supply  
output voltage.  
ꢂ ꢔꢃꢋ  
ꢁ IS  
ꢋ ꢂꢆ  
SECONDARY BYPASS (BPS) Pin (Pin 4)  
Connection point for an external bypass capacitor for the secondary  
IC supply.  
ꢀꢁꢂꢃ8ꢃꢃꢂ0ꢄꢄꢄ1ꢅ  
SYNCHRONOUS RECTIFIER DRIVE (SR) Pin (Pin 5)  
Gate driver for external SR FET. If no SR FET is used connect this pin  
to GND.  
Figure 5. Pin Configuration.  
InnoSwitch3-EP Functional Description  
OUTPUT VOLTAGE (VOUT) Pin (Pin 6)  
Connected directly to the output voltage, to provide current for the  
controller on the secondary-side and provide secondary protection.  
The InnoSwitch3-EP combines a high-voltage power MOSFET switch,  
along with both primary-side and secondary-side controllers in one  
device.  
FORWARD (FWD) Pin (Pin 7)  
The connection point to the switching node of the transformer output  
winding providing information on primary switch timing. Provides power  
for the secondary-side controller when VOUT is below threshold.  
The architecture incorporates a novel inductive coupling feedback  
scheme (FluxLink) using the package lead frame and bond wires to  
provide a safe, reliable, and cost-effective means to transmit  
accurate, output voltage and current information from the secondary  
controller to the primary controller.  
NC Pin (Pin 8-12)  
Leave open. Should not be connected to any other pins.  
UNDER/OVER INPUT VOLTAGE (V) Pin (Pin 13)  
A high-voltage pin connected to the AC or DC side of the input bridge  
for detecting undervoltage and overvoltage conditions at the power  
supply input. This pin should be tied to SOURCE pin to disable UV/OV  
protection.  
The primary controller on InnoSwitch3-EP is a Quasi-Resonant (QR)  
flyback controller that has the ability to operate in continuous  
conduction mode (CCM), boundary mode (CrM) and discontinuous  
conduction mode (DCM). The controller uses both variable frequency  
and variable current control schemes. The primary controller consists  
of a frequency jitter oscillator, a receiver circuit magnetically coupled to  
the secondary controller, a current limit controller, 5 V regulator on  
the PRIMARY BYPASS pin, audible noise reduction engine for light  
load operation, bypass overvoltage detection circuit, a lossless input  
line sensing circuit, current limit selection circuitry, over-temperature  
protection, leading edge blanking, secondary output diode / SR FET  
short protection circuit and a 725 V power MOSFET.  
PRIMARY BYPASS (BPP) Pin (Pin 14)  
The connection point for an external bypass capacitor for the  
primary-side supply. This is also the ILIM selection pin for choosing  
standard ILIM or ILIM+1.  
NC Pin (Pin 15)  
Leave open. Should not be connected to any other pins.  
SOURCE (S) Pin (Pin 16-19)  
These pins are the power MOSFET source connection. Also ground  
reference for primary BYPASS pin.  
The InnoSwitch3-EP secondary controller consists of a transmitter  
circuit that is magnetically coupled to the primary receiver, a constant  
voltage (CV) and a constant current (CC) control circuit, a 4.4 V  
regulator on the SECONDARY BYPASS pin, synchronous rectifier FET  
driver, QR mode circuit, oscillator and timing circuit, and numerous  
integrated protection features.  
DRAIN (D) Pin (Pin 24)  
Power MOSFET drain connection.  
Figure 3 and Figure 4 show the functional block diagrams of the  
primary and secondary controller, highlighting the most important  
features.  
3
Rev. D 08/18  
www.power.com  

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